EP3SE110F1152I3N vs EP3SE110F1152I2N 对比

详细并排对比 EP3SE110F1152I3N 出自 Altera 和 EP3SE110F1152I2N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP3SE110F1152I3N EP3SE110F1152I3N - Stratix III E FPGA, 107K LE, 1152-FCBGA | Altera

EP3SE110F1152I3N - Stratix III E FPGA, 107K LE, 1152-FCBGA | Altera

EP3SE110F1152I3N ⚠ 最后一次采购

规格对比

参数 EP3SE110F1152I3N EP3SE110F1152I2N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 有效
库存状态 有库存 有库存
单价(USD) $3,980.00 $1,480.00
Series Stratix III E Stratix III Enhanced (EP3SE110)
Family Stratix III E FPGA Stratix III
Manufacturer Altera (now Intel PSG) —
Logic Elements (LE) 107,500 107,500
Total RAM Bits 8,936,448 —
Maximum User I/Os 744 —
Logic Array Blocks (LABs) 4300 —
Number of I/O Banks Modular I/O banks (see Stratix III Device Handbook) —
Core Voltage 1.1 V —
Process Technology 65 nm CMOS 40 nm low-power CMOS
工作温度范围 -40C to +100C (industrial, I3 grade) —
Speed Grade -3 (I3 fast grade, industrial) I2
封装 1152-ball FC-FBGA (Flip-Chip Fine-pitch BGA) —
安装类型 Surface Mount Surface Mount
Lead-Free / RoHS Lead-free (N suffix); RoHS compliance status: see Stratix III Device Handbook Yes (suffix N)
Configuration JTAG via Quartus II; supports AS, PS, JTAG, FPP modes —
Internal Supply Voltage (Max) 0.94 V (per Partstack listing) —
Logic Array Blocks (LABs) / CLBs — 4,300
System Gates — 8,936,448
User I/O Pins — 744
Number of Terminals — 1,152
Package Code — BGA (FCBGA)
Package Shape — Square
Ball Pitch — 1.00 mm
Supply Voltage Range — 1.05 V to 1.15 V (nominal 1.1 V)
Maximum Internal Clock Frequency — 100 MHz (per distributor summary; device supports multi-Gbps transceivers)
工作温度 — -40C to +100C (industrial)

数据手册与资源

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