EP3SE260F1152C2 vs EP3SE260F1152C4 对比

详细并排对比 EP3SE260F1152C2 出自 Intel 和 EP3SE260F1152C4 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP3SE260F1152C2 EP3SE260F1152C4
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $2,400.00 $8,900.00
Manufacturer Intel (formerly Altera) —
Series Stratix® III E Stratix III E (Enhanced)
Logic Elements (LE) 255,000 255,000
Logic Array Blocks (LABs) 10,200 10,200
Embedded Memory (bits) 16,672,768 —
User I/Os 744 —
User I/O Banks [DATA_NEEDED: I/O bank count] —
Core Voltage (VCCINT) 1.1 V —
Process Technology 65 nm CMOS 65 nm CMOS (TSMC)
封装 1152-ball FC-FBGA (Flip Chip) 1152-pin FC-FBGA (Flip-Chip Fine-pitch BGA)
安装类型 Surface Mount Surface Mount (BGA)
Speed Grade C2 (commercial) C4 (slowest commercial grade)
工作温度 Commercial (0 °C to +85 °C junction) [DATA_NEEDED: exact TJ limits] Commercial (0C to +85C) - inferred from speed grade C4
RoHS 状态 Compliant Compliant (per distributor listings)
Lead-Free Yes —
MSL 等级 [DATA_NEEDED: MSL rating] —
Design Software Quartus II (Stratix III support) —
Family — Stratix III
Embedded Memory Bits — 16,672,768
User I/O Count — 744
Core Voltage — 1.1 V
Maximum Internal Frequency — ~450 MHz (per FPGAkey listing)
Package Code — BGA, square
I/O Standards Supported — LVDS, LVTTL, LVCMOS, SSTL, HSTL
Configuration Modes — Passive Serial, Fast Passive Parallel, JTAG
DSP Blocks (18x18 Multipliers) — 384
PLL Count — [DATA_NEEDED: PLL count]
Transceivers — External PHY interface only (no integrated GXB)

数据手册与资源

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