EP3SE260H780C3 vs EP3SE260H780C3N 对比

详细并排对比 EP3SE260H780C3 出自 Intel 和 EP3SE260H780C3N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP3SE260H780C3 EP3SE260H780C3N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $1,180.00 $1,325.00
Device Family Stratix III Enhanced (Stratix III E) —
Series EP3SE Stratix® III E
Logic Elements 255,000 —
Logic Array Blocks (LABs) 10200 —
Embedded Memory 16,672,768 bits (16.67 Mbit) —
User I/Os 488 488
Operating Voltage (Core) 0.9 V —
Operating Voltage (Auxiliary) 1.1 V —
Process Technology 65 nm CMOS 40 nm CMOS
Speed Grade C3 —
工作温度 Commercial, 0C to +85C 0 °C to +85 °C (C grade, commercial)
Maximum Core Frequency 500 MHz [DATA_NEEDED: maximum core frequency MHz]
封装 780-ball FCBGA (HBGA), flip-chip 780-BBGA, FCBGA (H780)
安装类型 Surface Mount (BGA) Surface Mount
湿敏等级(MSL) 3 (168 hours) [DATA_NEEDED: MSL level per JEDEC J-STD-020]
Packaging Type Tray —
Configuration Memory Support Fast passive parallel, JTAG, Active Serial —
RoHS 状态 Compliant (per product listings) Compliant (lead-free 'N' suffix)
Logic Elements (LE) — 255,000
Embedded Memory (bits) — 16,672,768
Number of LABs/CLBs — 10,200
Number of Pins / Balls — 780
Supply Voltage (VCCINT) — [DATA_NEEDED: VCCINT nominal V]
Transceivers — [DATA_NEEDED: number of embedded transceivers and max data rate]
DSP Blocks — [DATA_NEEDED: number of DSP blocks and precision]
Configuration Method — SRAM-based, configured via JTAG / passive / active serial / fast passive parallel
Design Toolchain — Altera Quartus II (legacy); Intel Quartus Prime

数据手册与资源

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