EP3SE260H780C3N vs EP3SE260H780C4L 对比
详细并排对比 EP3SE260H780C3N 出自 Intel 和 EP3SE260H780C4L 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP3SE260H780C3N | EP3SE260H780C4L |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $1,325.00 | $1,190.00 |
| Series | Stratix® III E | — |
| Logic Elements (LE) | 255,000 | — |
| Embedded Memory (bits) | 16,672,768 | — |
| Number of LABs/CLBs | 10,200 | — |
| User I/Os | 488 | — |
| Number of Pins / Balls | 780 | — |
| 封装 | 780-BBGA, FCBGA (H780) | 780-ball FCBGA (HBGA 33x33 mm) |
| 安装类型 | Surface Mount | Surface Mount (flip-chip BGA) |
| 工作温度 | 0 °C to +85 °C (C grade, commercial) | — |
| Process Technology | 40 nm CMOS | — |
| Maximum Core Frequency | [DATA_NEEDED: maximum core frequency MHz] | — |
| Supply Voltage (VCCINT) | [DATA_NEEDED: VCCINT nominal V] | — |
| Transceivers | [DATA_NEEDED: number of embedded transceivers and max data rate] | Up to 24 multi-gigabit transceivers |
| DSP Blocks | [DATA_NEEDED: number of DSP blocks and precision] | — |
| RoHS 状态 | Compliant (lead-free 'N' suffix) | Compliant (lead-free per datasheet) |
| 湿敏等级（MSL） | [DATA_NEEDED: MSL level per JEDEC J-STD-020] | — |
| Configuration Method | SRAM-based, configured via JTAG / passive / active serial / fast passive parallel | — |
| Design Toolchain | Altera Quartus II (legacy); Intel Quartus Prime | — |
| Family | — | Stratix III E |
| Logic Elements | — | 255,000 |
| LABs/CLBs | — | 10,200 |
| Total RAM Bits | — | 16,672,768 (16.7 Mbit) |
| User I/O Count | — | 488 |
| Speed Grade | — | C4 (middle/slow tier) |
| Core Voltage | — | 0.9 V (nominal) |
| 工作结温 | — | 0C to +85C (commercial) |
| MSL 等级 | — | [DATA_NEEDED: MSL level] |
| Memory Interface | — | DDR3, DDR2, QDRII+, RLDRAM II controllers |
| Configuration Mode | — | PS, FPP, JTAG with EPCS/EPCQ |