EP3SL50F780C3 vs EP3SE50F780C3 对比
详细并排对比 EP3SL50F780C3 出自 Intel 和 EP3SE50F780C3 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EP3SL50F780C3 - Stratix III L FPGA, 47.5K LE, 780-FBGA | Intel / Altera
EP3SL50F780C3 ⚠ 最后一次采购
规格对比
| 参数 | EP3SL50F780C3 | EP3SE50F780C3 |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $540.00 | $890.00 |
| Family | Stratix III L (low-power) | Stratix III E |
| Series | Stratix III | — |
| Logic Elements | 47,500 | — |
| Logic Array Blocks (LABs) | 1,900 | — |
| Embedded Memory Bits | 2,184,192 | — |
| User I/Os | 488 | 488 |
| Package Type | 780-BBGA, FCBGA (FineLine) | — |
| Device Pin Count | 780 | — |
| 工作温度 | 0C to +85C (Commercial) | 0C to +85C (Commercial grade, 'C' suffix) |
| Speed Grade | 3 | — |
| Supply Voltage (Core) | [DATA_NEEDED: VCCINT nominal value] | — |
| PLLs | 12 | — |
| Global Clock Networks | 24 | — |
| Process Node | 65 nm TSMC | — |
| Configuration Method | SRAM-based, supports Partial Reconfiguration | — |
| RoHS 状态 | Compliant | [DATA_NEEDED: RoHS status] |
| Lead-Free / Halogen-Free | Lead-Free (per package marking); Halogen-Free status unknown | — |
| 湿敏等级（MSL） | MSL3 (per JEDEC J-STD-020, typical for large FBGA) | — |
| Logic Elements (LE) | — | 47,500 |
| Embedded Memory (BRAM) | — | 5,760 Kbits |
| 封装 | — | 780-ball FC-FBGA (FineLine BGA) |
| Process Technology | — | 65 nm |
| Core Voltage | — | 1.1 V |
| Logic Voltage | — | 0.9 V |
| Transceiver Speed (max) | — | 500 MHz |
| Total LABs/CLBs | — | 1900 |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Number of Transceivers | — | [DATA_NEEDED: transceiver count] |
| 安装类型 | — | Surface Mount (BGA) |
| MSL 等级 | — | [DATA_NEEDED: MSL level] |