EP610DC-10 vs EP610DI-25 对比
详细并排对比 EP610DC-10 出自 Intel 和 EP610DI-25 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP610DC-10 | EP610DI-25 |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $7.95 | $9.95 |
| Device Family | Altera Classic EPLD | — |
| Macrocells | 16 | 16 |
| Maximum Pipelined Data Rate | 100 MHz | — |
| Pin-to-Pin Propagation Delay (tpd) | 10 ns | — |
| Speed Grade | -10 | — |
| 封装 | 24-pin CDIP (Ceramic DIP, windowed) | — |
| 安装类型 | Through-Hole | Through-Hole (DIP) |
| Technology | CMOS, EPROM-based (UV-erasable) | CMOS EPROM (UV-erasable) |
| 电源电压 | 5 V (single supply) | — |
| 工作温度 | 0C to +70C (commercial) | Industrial (per "I" suffix) |
| I/O Pins | [DATA_NEEDED: exact I/O count for CDIP-24 variant] | 16 (bidirectional) |
| Logic Elements | 16 macrocells (programmable AND/OR array) | — |
| Configuration Memory | UV-erasable EPROM | — |
| Reprogrammable | Yes (UV erase window on package) | — |
| RoHS 状态 | [DATA_NEEDED: not stated in verified web data] | — |
| Part Family | — | Classic EPLD |
| Propagation Delay (tPD) | — | 25 ns |
| Maximum Pipelined Clock Frequency | — | 100 MHz (max fCNT, per family datasheet) |
| Dedicated Inputs | — | 4 |
| Total User I/O | — | 20 |
| Supply Voltage (VCC) | — | 5 V nominal |
| Package Type | — | Ceramic DIP, glass-sealed (windowed), R-GDIP-T24 |
| 引脚数量 | — | 24 |
| Speed Grade Suffix | — | 25 = 25 ns |
| Compliance | — | RoHS status unknown (legacy 1990s part) |