EP610DC-30 vs EP610DM-35 对比

详细并排对比 EP610DC-30 出自 Altera 和 EP610DM-35 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP610DC-30 EP610DM-35
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $10.40 $23.40
Product Type Classic EPLD (Erasable Programmable Logic Device) —
Family EP610 (Classic Device Family) —
Macrocells 16 —
Logic Expanders 4 (4 product terms per macrocell) —
Usable Gates 300 —
Maximum Pipelined Clock Frequency 100 MHz —
Propagation Delay (tPD) 30 ns 35 ns
Dedicated Inputs 16 —
I/O Pins 16 (with output enable) 24 dedicated I/O (input + bidirectional)
封装 24-pin CERDIP (windowed) 24-pin CDIP (CERDIP) with UV window
安装类型 Through-Hole —
Speed Grade -30 (30 ns tPD) —
Technology CMOS EPROM —
Programmability UV-erasable, windowed EPROM UV-erasable, reprogrammable
Security Bit Yes (protects design after programming) —
Output Modes Registered and Combinatorial —
工作温度 Commercial (0C to +70C) —
Manufacturer — Altera (Rochester Electronics authorized stock)
Part Family — Classic EPLD
Logic Family — PAL-type EPLD, CMOS, UV-erasable
Number of Macrocells — 16
Number of Gates — 300
Pipelined Data Rate (fMAX) — 100 MHz
Supply Voltage (VCC) — 5 V (single supply)
Temperature Grade (M) — Military -55°C to +125°C
工作温度范围 — -55°C to +125°C
MSL 等级 — [DATA_NEEDED: MSL rating]
RoHS 状态 — Non-compliant (contains lead, hermetic CERDIP)

数据手册与资源

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