EP610DC-30 vs EP610DM-35 Comparison

Detailed side-by-side comparison of EP610DC-30 by Altera and EP610DM-35 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP610DC-30 EP610DM-35
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $10.40 $23.40
Product Type Classic EPLD (Erasable Programmable Logic Device) β€”
Family EP610 (Classic Device Family) β€”
Macrocells 16 β€”
Logic Expanders 4 (4 product terms per macrocell) β€”
Usable Gates 300 β€”
Maximum Pipelined Clock Frequency 100 MHz β€”
Propagation Delay (tPD) 30 ns 35 ns
Dedicated Inputs 16 β€”
I/O Pins 16 (with output enable) 24 dedicated I/O (input + bidirectional)
Package 24-pin CERDIP (windowed) 24-pin CDIP (CERDIP) with UV window
Mounting Type Through-Hole β€”
Speed Grade -30 (30 ns tPD) β€”
Technology CMOS EPROM β€”
Programmability UV-erasable, windowed EPROM UV-erasable, reprogrammable
Security Bit Yes (protects design after programming) β€”
Output Modes Registered and Combinatorial β€”
Operating Temperature Commercial (0C to +70C) β€”
Manufacturer β€” Altera (Rochester Electronics authorized stock)
Part Family β€” Classic EPLD
Logic Family β€” PAL-type EPLD, CMOS, UV-erasable
Number of Macrocells β€” 16
Number of Gates β€” 300
Pipelined Data Rate (fMAX) β€” 100 MHz
Supply Voltage (VCC) β€” 5 V (single supply)
Temperature Grade (M) β€” Military -55Β°C to +125Β°C
Operating Temperature Range β€” -55Β°C to +125Β°C
MSL Level β€” [DATA_NEEDED: MSL rating]
RoHS Status β€” Non-compliant (contains lead, hermetic CERDIP)

Datasheets & Resources

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