EP610IPC-10 vs EP610DM-35 对比

详细并排对比 EP610IPC-10 出自 Altera 和 EP610DM-35 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP610IPC-10 EP610DM-35
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $16.40 $23.40
Family Altera Classic EPLD —
Device Type EPLD (Erasable Programmable Logic Device) —
Programmable Gates 300 usable gates —
Macrocells 16 —
Maximum Operating Frequency 100 MHz —
Propagation Delay (tPD) 15 ns (commerical -10 grade) 35 ns
Product Terms 160 total —
Dedicated Inputs 4 —
I/O Pins 16 24 dedicated I/O (input + bidirectional)
Total Input Pins 20 —
电源电压 5 V —
Architecture Turbo-only AND-OR-NOT, PAL-type —
Technology CMOS EPROM (UV-erasable / OTP) —
封装 24-pin PDIP (Plastic DIP) 24-pin CDIP (CERDIP) with UV window
工作温度 -40C to +85C (industrial) —
Programming Method Altera programming hardware (UV erase for I grade, OTP for C grade) —
TTL Emulation 100% TTL compatible —
Manufacturer — Altera (Rochester Electronics authorized stock)
Part Family — Classic EPLD
Logic Family — PAL-type EPLD, CMOS, UV-erasable
Number of Macrocells — 16
Number of Gates — 300
Pipelined Data Rate (fMAX) — 100 MHz
Supply Voltage (VCC) — 5 V (single supply)
Temperature Grade (M) — Military -55°C to +125°C
Programmability — UV-erasable, reprogrammable
工作温度范围 — -55°C to +125°C
MSL 等级 — [DATA_NEEDED: MSL rating]
RoHS 状态 — Non-compliant (contains lead, hermetic CERDIP)

数据手册与资源

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