EP910LC-30Y vs EP910LC-25 对比
详细并排对比 EP910LC-30Y 出自 Altera 和 EP910LC-25 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP910LC-30Y | EP910LC-25 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $25.40 | $2.20 |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | — |
| Pin-to-Pin Delay (tPD) | 30 ns | — |
| Counter Frequency (fMAX) | 100 MHz (family maximum) | — |
| 电源电压 | 5 V (TTL-compatible) | — |
| Process Technology | CMOS, UV-erasable / OTP | — |
| 封装 | PLCC-44 | 28-pin PLCC (LC suffix) |
| 工作温度 | Commercial 0C to +70C | 0C to +70C (commercial) |
| Speed/Power Grade | LC (low-power, 30ns) | — |
| Processing Flow | Y (extended reliability) | — |
| Logic Compatibility | 100% TTL emulation | — |
| 安装类型 | Surface Mount (PLCC socket) | Surface Mount |
| RoHS 状态 | [DATA_NEEDED: RoHS status not specified in retrieved data] | [DATA_NEEDED: RoHS status] |
| Logic Gates | — | [DATA_NEEDED: logic gate count] |
| Propagation Delay (tPD) | — | 25 ns |
| Dedicated Inputs | — | 16 |
| Technology | — | CMOS (EPROM-based) |
| Operating Voltage | — | [DATA_NEEDED: VCC range] |
| Programmable | — | Yes (EPROM, UV-erasable on windowed variants) |
| I/O Pins | — | [DATA_NEEDED: I/O count] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Maximum Frequency | — | [DATA_NEEDED: fMAX] |