EP910LC-40 vs EP910JC-30 对比

详细并排对比 EP910LC-40 出自 Rochester Electronics 和 EP910JC-30 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP910LC-40 EP910JC-30
品牌 Rochester Electronics Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $52.00 $9.75
Manufacturer Rochester Electronics (Altera original) —
Device Family Altera Classic EPLD - EP910 —
Product Type EPLD (Erasable Programmable Logic Device) —
Usable Gates 450 —
Macrocells 24 24
Logic Array Blocks 2 (12 macrocells each) —
Propagation Delay (tPD) 40 ns —
Maximum Toggle Frequency (fMAX) 25 MHz —
User I/O Pins 36 —
Dedicated Inputs 4 —
Supply Voltage (VCC) 5 V (single supply) —
Technology CMOS EPROM CMOS EPROM, UV-erasable
封装 PQCC-44 (Plastic Leaded Chip Carrier, J-lead) 44-pin Windowed Ceramic J-Lead Chip Carrier (CQCC-44 / JLCC-44)
Operating Temperature (Commercial) 0 C to +70 C —
Programming Method Altera Logic Programmer (PLAD-J), 4-wire serial —
RoHS 状态 Not applicable (legacy) [DATA_NEEDED: RoHS compliance]
Lead-Free Status Not applicable —
Family — Classic EPLD (MAX-style)
Propagation Delay (tpd) — 30 ns
Maximum Internal Frequency (Fmax) — 33.3 MHz
Inputs — 36
Product Terms — 240
Outputs — 10 dedicated
Supply Voltage (Vcc) — 5 V
工作温度 — [DATA_NEEDED: operating temperature range]
Supply Current (Icc) — [DATA_NEEDED: Icc typical / maximum]
安装类型 — Surface Mount (socket-mountable)
Logic Blocks — 24 macrocells (AND/OR array architecture)

数据手册与资源

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