EP910LI-35BF vs EP910LI-30T 对比

详细并排对比 EP910LI-35BF 出自 Altera 和 EP910LI-30T 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP910LI-35BF EP910LI-30T
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $23.95 $64.59
Device Family Altera Classic EPLD —
Part Number Base EP910 —
Logic Density 450 usable gates —
Macrocells 24 —
Maximum Pin-to-Pin Delay (tpd) 35 ns —
Maximum Toggle Frequency (fmax) 28.6 MHz —
Supply Voltage (VCC) 5 V (nominal) —
封装 44-pin PLCC (J-lead) PQCC-44 (J-lead)
工作温度范围 Industrial (LI suffix) —
Technology CMOS, UV-erasable CMOS, UV-erasable
Programming Method EPROM/UV-erase programmer (Altera Classic algorithm) EPROM (UV-erasable) via Altera Logic Programmer
Output Polarity Control Programmable XOR per macrocell —
Flip-Flop Type Selectable D/T/JK/SR per macrocell —
TTL Compatibility 100% TTL emulation —
Compliance / EOL Status Obsolete - last-time buy exhausted; second-source via Rochester Electronics —
Family — Altera Classic EPLD
Number of Macrocells — 24
Usable Gates — 450
Propagation Delay (tPD) — 30 ns
Clock-to-Output (tCO) — [DATA_NEEDED: tCO]
Maximum Frequency (fMAX) — [DATA_NEEDED: fMAX]
Dedicated Inputs — 10
I/O Pins — 24
工作温度 — -40C to +85C (Industrial)
电源电压 — [DATA_NEEDED: VCC]
安装类型 — Surface Mount
RoHS 状态 — [DATA_NEEDED: RoHS]
Lead-Free — [DATA_NEEDED: Lead-free]

数据手册与资源

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