EP910LI-40T vs EP910LI-35 对比
详细并排对比 EP910LI-40T 出自 Intel 和 EP910LI-35 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP910LI-40T | EP910LI-35 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.75 | $25.80 |
| Family | Classic EPLD | Altera Classic EPLD |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | — |
| I/O Pins | 24 | — |
| Maximum Inputs | 36 | — |
| Maximum Outputs | 24 | — |
| Product Terms | 240 | — |
| Propagation Delay (tPD) | 40 ns | — |
| Technology | CMOS, UV-erasable EPROM | — |
| 电源电压 | 5 V (typical) | 5 V (4.75 V to 5.25 V) |
| 工作温度 | -40C to +85C (Industrial) | -40 °C to +85 °C (Industrial) |
| Architecture | PAL-type with global bus | — |
| 封装 | Tape and Reel (suffix T); 40-pin DIP / 44-pin PLCC | 44-pin PLCC (J-lead) |
| RoHS 状态 | [DATA_NEEDED: rohs status] | — |
| Programming Method | Altera Master Programming Unit (MPU), no JTAG | — |
| Device Series | — | EP910 |
| Usable Gates | — | 900 |
| Maximum User I/O Pins | — | 38 |
| Propagation Delay (t_PD) | — | 35 ns |
| Maximum Counter Frequency (f_CNT) | — | 76.9 MHz |
| Process Technology | — | CMOS EPROM |
| Programming Technology | — | EPROM (UV-erasable) |
| Erase/Program Cycles | — | ≥100 |
| 安装类型 | — | Surface Mount |
| Lead Pitch | — | 1.27 mm |