EP910PI-20T vs EP910PI-12T 对比

详细并排对比 EP910PI-20T 出自 Intel 和 EP910PI-12T 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP910PI-20T EP910PI-12T
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $9.95 $9.95
Family Altera Classic EPLD Altera Classic EPLD
Device EP910 —
Number of Macrocells 24 —
Number of Usable Gates [DATA_NEEDED: usable gate count] —
Propagation Delay (tpd) 20 ns —
Maximum Toggle Frequency 62.5 MHz —
Number of Dedicated Inputs 12 —
Number of I/O Pins 20 —
引脚数 40 —
封装 PDIP-40 (PI) 40-pin PDIP (Plastic DIP)
安装类型 Through-Hole (DIP) —
Technology CMOS EPROM (UV-erasable) —
工作温度 [DATA_NEEDED: operating temperature range] 0C to +70C (commercial)
Programming Standard EPROM programmer, JEDEC map —
RoHS 状态 unknown Non-compliant (legacy PDIP package, contains lead)
生命周期状态 Not Recommended for New Designs (NRND) NRND / EOL (mature legacy product)
Macrocells — 24
Propagation Delay (tPD) — 12 ns
Maximum Operating Frequency — 76.9 MHz
Logic Gates — [DATA_NEEDED: logic gate count]
Supply Voltage (VCC) — 5 V (4.75 V min, 5.25 V max)
I/O Pins — 24
Dedicated Inputs — 12
External Clock Inputs — 2
Outputs — 24
Terminals / Pin Count — 44 (PDIP-40 package pinout with NC pins)
Process Technology — CMOS
Programmable Technology — UV-erasable EPROM
Programming Interface — JEDEC-standard

数据手册与资源

浏览全部产品 创建 BOM 获取报价