EP910PI-20T vs EP910PI-12T Comparison
Detailed side-by-side comparison of EP910PI-20T by Intel and EP910PI-12T by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910PI-20T | EP910PI-12T |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | NRND |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Device | EP910 | — |
| Number of Macrocells | 24 | — |
| Number of Usable Gates | [DATA_NEEDED: usable gate count] | — |
| Propagation Delay (tpd) | 20 ns | — |
| Maximum Toggle Frequency | 62.5 MHz | — |
| Number of Dedicated Inputs | 12 | — |
| Number of I/O Pins | 20 | — |
| Number of Pins | 40 | — |
| Package | PDIP-40 (PI) | 40-pin PDIP (Plastic DIP) |
| Mounting Type | Through-Hole (DIP) | — |
| Technology | CMOS EPROM (UV-erasable) | — |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| Programming | Standard EPROM programmer, JEDEC map | — |
| RoHS Status | unknown | Non-compliant (legacy PDIP package, contains lead) |
| Lifecycle Status | Not Recommended for New Designs (NRND) | NRND / EOL (mature legacy product) |
| Macrocells | — | 24 |
| Propagation Delay (tPD) | — | 12 ns |
| Maximum Operating Frequency | — | 76.9 MHz |
| Logic Gates | — | [DATA_NEEDED: logic gate count] |
| Supply Voltage (VCC) | — | 5 V (4.75 V min, 5.25 V max) |
| I/O Pins | — | 24 |
| Dedicated Inputs | — | 12 |
| External Clock Inputs | — | 2 |
| Outputs | — | 24 |
| Terminals / Pin Count | — | 44 (PDIP-40 package pinout with NC pins) |
| Process Technology | — | CMOS |
| Programmable Technology | — | UV-erasable EPROM |
| Programming Interface | — | JEDEC-standard |