EPC16QC100 vs EPC16QC100N 对比

详细并排对比 EPC16QC100 出自 Altera 和 EPC16QC100N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC16QC100 EPC16QC100N
品牌 Altera Altera
分类 Memory ICs Memory ICs
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $14.95 $24.10
存储器类型 Flash Configuration PROM (non-volatile) —
存储容量 16 Mbit 16 Mbit (16,777,216 bits)
Configuration Clock (max) 33 MHz —
接口 Altera enhanced configuration serial interface —
In-System Programmability Yes (IEEE 1149.1 JTAG) —
Supply Voltage (VCC) 3.0 V to 3.6 V 3.0 V to 3.6 V
工作温度 -40C to +85C (commercial) 0 C to 70 C
封装 100-pin PQFP (20 x 14 mm) 100-pin PQFP (20 x 14 mm)
安装类型 Surface Mount Surface Mount
Cascadable Yes (multi-device chain) —
Compression Support Yes (Altera enhanced compression) —
Supported FPGA Families Stratix, APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX
Configuration Controller Integrated on-die —
MSL 等级 [DATA_NEEDED: MSL level] —
RoHS 状态 [DATA_NEEDED: RoHS status] —
Programmable Type — In System Programmable
Configuration Clock Frequency — 33 MHz max
On-Chip Decompression — Yes (supports compressed bitstreams)
Access Time — 90 ns typical
Flash Read Bandwidth — 160 Mbps (16-bit DQ at 10 MHz)
Configuration Interface — FPP / PS / AS via dedicated FPGA pins
JTAG (IEEE 1149.1) ISP — Supported
Lead Free — Yes (per datasheet)
Packaging — Tray

数据手册与资源

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