EPC16QC100N vs EPC16QI100TBAC 对比

详细并排对比 EPC16QC100N 出自 Altera 和 EPC16QI100TBAC 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPC16QI100TBAC EPC16QI100TBAC - Altera Enhanced Configuration PROM 16Mb | FPGA

EPC16QI100TBAC - Altera Enhanced Configuration PROM 16Mb | FPGA

EPC16QI100TBAC ⚠ 最后一次采购

规格对比

参数 EPC16QC100N EPC16QI100TBAC
品牌 Altera Altera
分类 Memory ICs Memory ICs
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $24.10 $15.95
存储容量 16 Mbit (16,777,216 bits) —
Programmable Type In System Programmable —
Configuration Clock Frequency 33 MHz max —
On-Chip Decompression Yes (supports compressed bitstreams) —
Supply Voltage (VCC) 3.0 V to 3.6 V —
Access Time 90 ns typical —
Flash Read Bandwidth 160 Mbps (16-bit DQ at 10 MHz) —
Configuration Interface FPP / PS / AS via dedicated FPGA pins —
JTAG (IEEE 1149.1) ISP Supported —
工作温度 0 C to 70 C -40C to +85C (industrial)
封装 100-pin PQFP (20 x 14 mm) 100-pin PQFP (20 x 14 mm)
安装类型 Surface Mount Surface Mount (PQFP)
Lead Free Yes (per datasheet) —
Packaging Tray —
Supported FPGA Families ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX Altera Stratix, Cyclone, Arria series
Memory Density — 16 Mbit (2 Mbyte)
存储器类型 — Flash (Enhanced Configuration Device)
电源电压 — 3.3 V
Configuration Modes — Passive Parallel Synchronous (PPS), Passive Parallel Asynchronous (PPA), Passive Serial (PS)
Maximum Configuration Clock — 40 MHz
Number of Configuration Pages — Up to 8 (selectable via PGM[2..0])
In-System Programmable — Yes (via JTAG / IEEE 1149.1)
JTAG Support — Yes (IEEE 1149.1 boundary-scan and programming)
Data Compression — Supported (15-30% density gain depending on target FPGA)
MSL 等级 — 3 (168 hours)
Lead-Free / RoHS — Lead-free (per JEDEC J-STD-020); RoHS compliance: [DATA_NEEDED]
Dynamic Reconfiguration — Yes (page mode via PGM[2..0] pins)
Configuration Controller — Integrated
Programming Interface — JTAG / 4-wire passive serial

数据手册与资源

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