EPC1PC8N vs EPC1PC8CC 对比

详细并排对比 EPC1PC8N 出自 Intel 和 EPC1PC8CC 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC1PC8N EPC1PC8CC
品牌 Intel Intel
分类 Memory ICs Memory ICs
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $4.40 $9.95
存储器类型 OTP (One-Time Programmable) Configuration PROM EPROM (OTP, UV-erasable window optional)
存储容量 1 Mbit 1 Mbit (1,048,576 bits)
存储组织 Serial (DCLK + DATA) —
电源电压 3.0 V to 3.6 V —
Supply Voltage (Typical) 3.3 V —
接口 Altera PS Serial / JTAG (IEEE 1149.1) —
Programmability In-system via JTAG; OTP after programming —
Standby Current [DATA_NEEDED: standby current uA] —
Active Current [DATA_NEEDED: active current mA] —
工作温度 [DATA_NEEDED: operating temperature range C] —
封装 8-pin PDIP (PC8N suffix) PDIP-8 (Plastic DIP, 8-pin, 0.1" pitch)
安装类型 Through-Hole Through-Hole (DIP socketable)
RoHS 状态 Compliant (PC8N suffix indicates lead-free) —
Configuration Mode Serial (PS mode) —
JTAG Compliance IEEE Std. 1149.1-1990 boundary-scan —
功能 — FPGA Configuration PROM
Configuration Interface — Altera Passive Serial (PS), 4-wire (nSTATUS, nCONFIG, DCLK, DATA0)
Supply Voltage VCC — 3.0 V to 3.6 V (typical 3.3 V)
Maximum DCLK Frequency — 17.6 MHz (17.6 Mb/s effective bitstream rate)
工作温度范围 — [DATA_NEEDED: full industrial range from datasheet]
Cascade Support — Not supported in DIP-8 package (nCASC pin not exposed)
Programming Interface — JTAG via Altera Quartus / Quartus Prime ByteBlaster
Error Detection — Built-in CRC during configuration transfer
MSL 等级 — 1 (unlimited floor life)
Lead-Free / RoHS — Not lead-free (legacy Altera/Intel PC8 suffix is Sn-Pb finish); RoHS non-compliant variant
Compatible FPGA Families — ACEX 1K, APEX 20K, APEX II, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, FLEX 8000, MAX 7000B/AE/S, MAX 9000, Mercury, Stratix, Stratix II, Arria
引脚数量 — 8

数据手册与资源

浏览全部产品 创建 BOM 获取报价