EPC1PC8N vs EPC1PC8CC Vergleich
Detaillierter Direktvergleich von EPC1PC8N von Intel und EPC1PC8CC von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC1PC8N | EPC1PC8CC |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $4,40 | $9,95 |
| Speichertyp | OTP (One-Time Programmable) Configuration PROM | EPROM (OTP, UV-erasable window optional) |
| Speichergröße | 1 Mbit | 1 Mbit (1,048,576 bits) |
| Speicherorganisation | Serial (DCLK + DATA) | — |
| Versorgungsspannung | 3.0 V to 3.6 V | — |
| Supply Voltage (Typical) | 3.3 V | — |
| Schnittstelle | Altera PS Serial / JTAG (IEEE 1149.1) | — |
| Programmability | In-system via JTAG; OTP after programming | — |
| Standby Current | [DATA_NEEDED: standby current uA] | — |
| Active Current | [DATA_NEEDED: active current mA] | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range C] | — |
| Gehäuse | 8-pin PDIP (PC8N suffix) | PDIP-8 (Plastic DIP, 8-pin, 0.1" pitch) |
| Montageart | Through-Hole | Through-Hole (DIP socketable) |
| RoHS-Status | Compliant (PC8N suffix indicates lead-free) | — |
| Configuration Mode | Serial (PS mode) | — |
| JTAG Compliance | IEEE Std. 1149.1-1990 boundary-scan | — |
| Funktion | — | FPGA Configuration PROM |
| Configuration Interface | — | Altera Passive Serial (PS), 4-wire (nSTATUS, nCONFIG, DCLK, DATA0) |
| Supply Voltage VCC | — | 3.0 V to 3.6 V (typical 3.3 V) |
| Maximum DCLK Frequency | — | 17.6 MHz (17.6 Mb/s effective bitstream rate) |
| Betriebstemperaturbereich | — | [DATA_NEEDED: full industrial range from datasheet] |
| Cascade Support | — | Not supported in DIP-8 package (nCASC pin not exposed) |
| Programming Interface | — | JTAG via Altera Quartus / Quartus Prime ByteBlaster |
| Error Detection | — | Built-in CRC during configuration transfer |
| MSL-Level | — | 1 (unlimited floor life) |
| Lead-Free / RoHS | — | Not lead-free (legacy Altera/Intel PC8 suffix is Sn-Pb finish); RoHS non-compliant variant |
| Compatible FPGA Families | — | ACEX 1K, APEX 20K, APEX II, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, FLEX 8000, MAX 7000B/AE/S, MAX 9000, Mercury, Stratix, Stratix II, Arria |
| Pin-Anzahl | — | 8 |