EPC2L20 vs EPC2LC20CAD 对比

详细并排对比 EPC2L20 出自 Altera 和 EPC2LC20CAD 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC2L20 EPC2LC20CAD
品牌 Altera Altera
分类 Memory ICs Memory ICs
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $25.80 $9.75
存储器类型 Configuration PROM (non-volatile) Configuration PROM (Flash)
存储容量 1.6 Mbit —
存储组织 8-bit byte —
接口 Serial FPGA configuration + JTAG (IEEE 1149.1 / IEEE 1532) —
Programmability In-system programmable via JTAG —
Core Supply Voltage (VCCINT) 3.3 V —
I/O Supply Voltage (VCCIO) 3.3 V or 5.0 V (VCCSEL selectable) —
Cascade Support Yes - multi-device daisy chain —
Boundary Scan JTAG IEEE 1149.1 BST —
封装 20-pin PLCC (J-lead) 20-pin J-lead PLCC (PLCC-20)
安装类型 Surface Mount (PLCC socket compatible) Surface Mount / Through-hole (PLCC socket)
工作温度 [DATA_NEEDED: operating temperature range] -40C to +85C (commercial)
MSL 等级 [DATA_NEEDED: MSL rating] —
RoHS 状态 RoHS Compliant (per IC Components listing) Compliant
Process Technology Low-power CMOS —
Target FPGAs APEX II, APEX 20K, Mercury, ACEX 1K, Cyclone, Stratix —
Memory Capacity — 1.6 Mbit
电源电压 — 3.3 V (nominal)
I/O Voltage Tolerance — 5 V tolerant
Configuration Mode — Serial (bit-wide, Altera FPGAs)
Program Interface — IEEE Std 1149.1 JTAG (in-system programmable)
引脚数量 — 20
Maximum Input Voltage (DC) — -0.3 V to +7.0 V
Input Undershoot/Overshoot — -2.0 V to +7.0 V for <100 mA, <20 ns no-load
Compatible FPGA Families — APEX 20K, ACEX 1K, Cyclone, Stratix
Programming Method — JTAG ISP (no external programmer required)

数据手册与资源

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