EPC2LC20-T vs EPC2LI20 对比

详细并排对比 EPC2LC20-T 出自 Altera 和 EPC2LI20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPC2LC20-T EPC2LC20-T - 1.6Mb FPGA Config PROM PLCC-20 | Altera

EPC2LC20-T - 1.6Mb FPGA Config PROM PLCC-20 | Altera

EPC2LC20-T ⚠ 最后一次采购

规格对比

参数 EPC2LC20-T EPC2LI20
品牌 Altera Altera
分类 Memory ICs Memory ICs
生命周期状态 最后采购期 不推荐新设计
库存状态 有库存 有库存
单价(USD) $7.40 $5.95
存储器类型 Configuration PROM (Flash) Flash (in-system programmable)
存储容量 1.6 Mb 1.6 Mb (1,572,864 bits)
Configuration Mode Serial (PS mode), cascadable —
Max Configuration Frequency 10 MHz —
电源电压 3.3 V (typical) —
Programmability In-System Programmable via JTAG —
JTAG Interface IEEE Std 1149.1-1990 compliant —
Supported FPGA Families ACEX, APEX, Cyclone, FLEX, MAX 7000A/B, MAX II, Mercury —
Cascade Support Yes (nCASC pin) —
工作温度 -40C to +85C (industrial) -40 C to +85 C (Industrial)
封装 20-PLCC (9x9 mm) —
安装类型 Surface Mount Surface Mount (PLCC socket-compatible)
Packaging Suffix -T = Tape and Reel —
RoHS 状态 Compliant [DATA_NEEDED: RoHS status]
Lead-Free Yes —
Programmable Type — In System Programmable (ISP)
功能 — Configuration PROM for SRAM-based FPGAs
Supply Voltage - Operating — 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing)
封装 / 外壳 — 20-PLCC (J-lead, 9x9 mm)
Configuration Interface — Serial or Byte-wide (parallel)
Decompression — On-chip (supports compressed bitstreams)
JTAG / ISP Interface — IEEE 1532 (TCK, TMS, TDI, TDO)
Multi-Device Support — Yes (daisy-chain configuration)
User-Accessible Memory — Yes (unused flash available to user logic)
MSL 等级 — [DATA_NEEDED: MSL level]

数据手册与资源

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