EPC2T32U vs EPC2T32U-CAF48 对比

详细并排对比 EPC2T32U 出自 Altera 和 EPC2T32U-CAF48 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC2T32U EPC2T32U-CAF48
品牌 Altera Altera
分类 Memory ICs Memory ICs
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $16.10 $17.60
功能 Configuration PROM for SRAM-based LUT FPGAs —
Memory Density 1.6 Mbit 2 Mb (2097152 bits)
电源电压 3.3 V or 5.0 V (user-selectable) —
Programmability In-system programmable via JTAG (IEEE 1149.1) —
Configuration Modes Supported Passive serial, passive parallel synchronous, passive parallel asynchronous, JTAG —
封装 32-pin TQFP 48-pin QFN (CAF suffix)
工作温度 Commercial / Industrial grade [DATA_NEEDED: exact range] -40 C to +85 C (industrial grade, "U")
Cascading Support Yes, via dedicated cascade port for density expansion —
Compression Support Altera bitstream decompression (up to 50% storage reduction) —
Compatible FPGA Families APEX II, APEX 20K, Mercury, ACEX 1K —
Lead-Free Finish Yes (per part suffix 'U') Yes (CAF suffix indicates lead-free)
安装类型 Surface Mount Surface Mount
MSL 等级 [DATA_NEEDED: MSL rating] [DATA_NEEDED: MSL level]
RoHS 状态 Compliant Compliant
Hand-shake Pins nSTATUS, nCONFIG, CONF_DONE —
存储器类型 — Non-volatile flash configuration memory
Configuration Interface — Altera FPP (8-bit) / PS (4-wire) / AS (serial)
Maximum Configuration Clock (DCLK) — 8 MHz
Supply Voltage (VCC) — 3.3 V (typical)
I/O Tolerance — 5 V tolerant
Program/Erase Endurance — 10,000 cycles per sector minimum
Data Retention — 20 years minimum
Programming Interface — IEEE 1149.1 (JTAG) / IEEE 1532
Supported FPGA Families — Cyclone, Cyclone II, Stratix, APEX 20K, ACEX 1K, Mercury, Excalibur

数据手册与资源

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