EPM3128ATC144-10N vs EPM3128ATC144-5 对比
详细并排对比 EPM3128ATC144-10N 出自 Intel 和 EPM3128ATC144-5 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM3128ATC144-10N | EPM3128ATC144-5 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $6.56 | $4.85 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 128 | — |
| Usable Gates | 2,500 (up to 10,000 for full family) | — |
| Logic Array Blocks (LABs) | 8 | — |
| User I/Os | 96 | — |
| Propagation Delay (tPD) | 10 ns (speed grade -10) | 7.5 ns |
| Counter Frequency (fCNT) | 98 MHz | — |
| Supply Voltage (VCCINT/VCCIO) | 3.3 V | — |
| MultiVolt I/O Support | 3.3 V / 2.5 V / 1.8 V | — |
| Configuration Memory | EEPROM (in-system programmable, non-volatile) | — |
| 封装 | 144-pin TQFP | TQFP-144 (Plastic, 1.0 mm pitch, 22x22 mm) |
| 安装类型 | Surface Mount | — |
| 工作温度 | 0 °C to +70 °C (commercial) | 0C to +70C (Commercial) |
| JTAG (IEEE 1149.1) | Yes (BST + pin-locking) | — |
| ISP (IEEE 1532) | Yes | — |
| Logic Family | — | CMOS |
| Number of Macrocells | — | 128 |
| Number of Logic Array Blocks (LABs) | — | 8 |
| Number of User I/Os | — | 96 |
| Device System Gates | — | 2500 |
| Product Terms per Macrocell | — | 32 |
| Maximum Internal Frequency | — | 192.3 MHz |
| Number of Global Clocks | — | 2 |
| Program Memory Type | — | EEPROM (non-volatile) |
| Supply Voltage (Core) | — | 3.3 V |
| Multi-Volt I/O Voltage | — | 2.5 V / 3.3 V / 5.0 V tolerant |
| In-System Programmability | — | Yes (IEEE Std. 1532 compliant) |
| JTAG / IEEE 1149.1 | — | Yes (boundary-scan + ISP) |
| Process Technology | — | 0.30 um CMOS EEPROM, 4 metal layers |
| RoHS 状态 | — | Not Compliant (per Arrow distributor listing) |
| ECCN | — | EAR99 |
| HTS Code | — | 8542.31.00.55 |