EPM3256AFC256-10 vs EPM3512AFC256-22 对比

详细并排对比 EPM3256AFC256-10 出自 Altera 和 EPM3512AFC256-22 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPM3256AFC256-10 EPM3256AFC256-10 - 256-Macro CPLD MAX 3000A | Intel / Altera | FBGA-256

EPM3256AFC256-10 - 256-Macro CPLD MAX 3000A | Intel / Altera | FBGA-256

EPM3256AFC256-10 ⚠ 最后一次采购

规格对比

参数 EPM3256AFC256-10 EPM3512AFC256-22
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 Obsolete
库存状态 有库存 有库存
单价(USD) $19.95 $16.10
Family MAX 3000A MAX 3000A
Logic Family CMOS (EEPROM-based) —
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macro Cells 256 —
Usable Gates 5,000 —
Logic Array Blocks (LABs) 16 (16 macrocells each) 16
Maximum User I/Os 161 —
Propagation Delay (tPD) 10 ns 22 ns
Internal Counter Frequency (fCNT) 95.2 MHz —
Supply Voltage (VCCINT) 3.3 V —
I/O Voltage Tolerance 5.0 V tolerant —
In-System Programmability Yes (3.3 V ISP via JTAG IEEE 1149.1) —
工作温度 0°C to +70°C (Commercial) [DATA_NEEDED: operating temperature grade]
封装 256-ball FBGA (Fine-Line BGA) FC-256 (FineLine BGA, 256 balls, 1.0 mm pitch)
Pitch [DATA_NEEDED: BGA ball pitch] —
安装类型 Surface Mount Surface Mount (BGA)
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS compliance status]
Macrocells — 512
Maximum User I/O Pins — 208 (typical for FC256 package)
Speed Grade — -22 (tPD ~22 ns)
Supply Voltage VCCINT — 3.3 V
I/O Standards Supported — 2.5 V, 3.3 V, 5.0 V (VCCIO selectable)
In-System Programming — IEEE Std. 1532-compliant ISP via JTAG
Configuration Memory — On-chip EEPROM (non-volatile)

数据手册与资源

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