EPM3512AQC210-10 vs EPM3512AFC256-10 对比
详细并排对比 EPM3512AQC210-10 出自 Altera 和 EPM3512AFC256-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM3512AQC210-10 | EPM3512AFC256-10 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $25.40 | $17.50 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Macrocells | 512 | — |
| Logic Array Blocks (LABs) | 16 (32 macrocells each) | 16 |
| Maximum User I/O Pins | 172 | — |
| Speed Grade | -10 (10 ns tPD) | — |
| Pin-to-Pin Propagation Delay (tPD1, max) | 10 ns | — |
| Maximum Operating Frequency (fCNT) | 125 MHz | — |
| Supply Voltage - Core (VCCINT) | 3.3 V | — |
| Supply Voltage - I/O (VCCIO) | 3.3 V or 2.5 V | — |
| Input Voltage Tolerance | 5.0 V tolerant | — |
| Programmable Technology | EEPROM (in-system programmable) | CMOS EEPROM |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| 封装 | PQFP-210 | 256-pin FBGA |
| 工作温度 | 0C to +70C (commercial) | — |
| 安装类型 | Surface Mount | Surface Mount |
| RoHS 状态 | [DATA_NEEDED: rohs_compliance_status] | unknown |
| Macrocells | — | 512 |
| Usable Gates | — | 10,000 |
| Maximum I/O Pins | — | 208 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 87 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Voltage Tolerance | — | 5-V tolerant |
| In-System Programmability | — | Yes (IEEE Std. 1149.1 JTAG / IEEE Std. 1532) |
| 工作温度范围 | — | [DATA_NEEDED: industrial/commercial operating temperature range] |
| 引脚数量 | — | 256 |
| Architecture | — | MAX (Multiple Array matriX) EEPROM-based |