EPM5032DM883B vs EPM5032DC 对比

详细并排对比 EPM5032DM883B 出自 Altera 和 EPM5032DC 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5032DM883B EPM5032DC
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $64.50 $10.40
Family MAX 5000 (Classic EPLD) MAX 5000
Macrocells 32 32
Logic Elements 32 macrocells (MAX architecture) —
Technology UV-erasable EPROM cell Bipolar EPROM, UV-erasable
Propagation Delay (tPD) [DATA_NEEDED: tPD in ns] —
Maximum Counter Frequency (fCNT) [DATA_NEEDED: fCNT in MHz] —
Supply Voltage (VCC) 5 V (nominal, TTL-compatible I/O) —
工作温度 MILITARY (per /883B screen) 0C to +70C
MIL-STD-883 Screening Class B (DM/883B) —
Package Type WDIP-28 (ceramic DIP with quartz window) —
引脚数量 28 24
安装类型 Through-Hole Through-hole (DIP)
Terminal Form Through-Hole —
Package Shape RECTANGULAR —
Programming Method Programmer + UV erase —
RoHS 状态 [DATA_NEEDED: lead-bearing ceramic; likely non-compliant] [DATA_NEEDED: RoHS status]
Device Type — EPLD (Erasable Programmable Logic Device)
Logic Array Blocks (LABs) — 1
封装 — DIP-24 (ceramic, windowed)
Speed Grade — DC (commercial)
Programmable Logic Elements — AND array + fixed OR array per macrocell
Configuration Memory — EPROM (UV-erasable via package window)
Programming Tool — Altera MAX+PLUS II / A+PLUS legacy
生命周期状态 — Obsolete (mature legacy)

数据手册与资源

浏览全部产品 创建 BOM 获取报价