EPM5128JC vs EPM5128JC-1 对比
详细并排对比 EPM5128JC 出自 Altera 和 EPM5128JC-1 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM5128JC | EPM5128JC-1 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.75 | $24.95 |
| Product Family | MAX 5000 | — |
| Device Type | EPLD / CPLD | Erasable Programmable Logic Device (EPLD/CPLD) |
| Macrocell Count | 128 | — |
| Propagation Delay (tPD) | 35 ns | — |
| Logic Elements | Programmable AND/OR/XOR array | — |
| Supply Voltage (VCC) | 5 V (typical) | 4.75 V to 5.25 V (5 V nominal) |
| 引脚数 | 68 | — |
| Package Type | PLCC-68 (JLCC) ceramic, J-leaded | — |
| Dedicated Inputs | 8 | — |
| User I/O Pins | [DATA_NEEDED: user I/O pin count] | — |
| Configuration Memory | UV-erasable EPROM (windowed package) | Non-volatile EPROM (UV-erasable) |
| Programming Interface | Altera MAX+PLUS II / A+PLUS / legacy programmer | JTAG / Altera dedicated programmer |
| 工作温度 | Commercial 0C to +70C | [DATA_NEEDED: temperature grade] |
| 安装类型 | Surface Mount (PLCC socket or solder) | Surface Mount |
| Boundary Scan | JTAG IEEE 1149.1 (family feature) | — |
| Process Technology | CMOS EPROM | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status - legacy part] | non_compliant (ceramic windowed package) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Family | — | MAX 5000 |
| Macrocells | — | 128 |
| Usable Gates | — | 2,500 |
| Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| Maximum Operating Frequency | — | 62.5 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 40 ns |
| Technology | — | CMOS, UV-erasable EPROM |
| 封装 | — | 68-pin CQCCJ (Windowed Ceramic J-Lead Chip Carrier) |
| 生命周期状态 | — | Obsolete - last-time-buy inventory only |