EPM5128LC2 vs EPM5128LC-1 对比
详细并排对比 EPM5128LC2 出自 Altera 和 EPM5128LC-1 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM5128LC2 | EPM5128LC-1 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $22.40 | $8.20 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | — |
| Logic Array Blocks (LABs) | 8 | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Global Clock Inputs | 1 dedicated | — |
| Propagation Delay (tPD) | 45 ns | — |
| Supply Voltage (VCC) | 5 V | 5 V (±10%) |
| Process Technology | CMOS EPROM | CMOS EPROM, UV-erasable |
| Configuration Memory | On-chip EPROM (non-volatile) | — |
| Boundary Scan | JTAG / IEEE 1149.1 | — |
| 工作温度 | -40 C to +85 C (extended commercial) | 0C to +70C (commercial) |
| 封装 | PGA (Pin Grid Array, ceramic) | — |
| 安装类型 | Through-Hole / Socketed | Surface Mount (J-lead PLCC socket compatible) |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Logic Elements / Macrocells | — | 128 macrocells |
| Number of Usable Gates | — | [DATA_NEEDED: usable gates] |
| Dedicated Inputs | — | 7 |
| Bidirectional I/O Pins | — | 52 |
| Total User I/O | — | 60 (max) |
| Propagation Delay (tpd) | — | 30 ns |
| Programmability | — | UV-erasable / OTP (windowed package) |
| Package Type | — | 68-pin J-lead ceramic chip carrier (PLCC windowed) |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |