EPM5130QC-1 vs EPM5130WC-1AA 对比

详细并排对比 EPM5130QC-1 出自 Altera 和 EPM5130WC-1AA 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5130QC-1 EPM5130WC-1AA
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.95 $54.25
Family MAX 5000 —
Product Type UV-Erasable / OTP Complex PLD (CPLD) —
Logic Cells / Macrocells 128 macrocells —
Usable Gates (marketing) 5130 gates —
Speed Grade -1 —
封装 PQFP-100 (windowed ceramic) Windowed Ceramic WQFP (AA suffix)
Terminal Pitch 0.635 mm —
Process Technology CMOS 5 V CMOS, UV-erasable
Configuration Memory UV-Erasable EPROM —
电源电压 5 V (single) —
工作温度 Commercial (0 C to +70 C) [DATA_NEEDED: commercial or industrial temp grade]
Programmable Polarity Yes (per macrocell) —
Boundary Scan / JTAG Per MAX 5000 family —
安装类型 Surface Mount —
RoHS 状态 [DATA_NEEDED: rohs status] unknown (legacy package, likely non-compliant)
Device Family — MAX 5000
Macrocell Count — 128
Number of Logic Array Blocks — 8 (typical for MAX 5130)
Propagation Delay (tPD, max) — 40 ns
Maximum Toggle Frequency (fCNT) — 50 MHz
Maximum Clock Frequency (fMAX) — [DATA_NEEDED: fMAX exact value]
Dedicated Inputs — 19
I/O Pins — 48
Total Inputs (incl. I/O feedback) — 68
Total Outputs — 48
Supply Voltage (VCC) — 5 V nominal
Programming Method — UV erase + EPROM programming
Logic-to-Pin Ratio — Highest in-class per Altera marketing literature

数据手册与资源

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