EPM5192AJM84-15 vs EPM5192ALC84-15 对比

详细并排对比 EPM5192AJM84-15 出自 Altera 和 EPM5192ALC84-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192AJM84-15 EPM5192ALC84-15
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $21.00 $13.20
Device Type UV Erasable Programmable Logic Device (EPLD) CPLD / UV-Erasable / OTP Complex PLD
Family MAX 5000 —
Macrocells 192 192
User I/O Pins 84 64
Speed Grade -15 (15 ns tPD) —
Propagation Delay (tPD) 15 ns 15 ns
Maximum Operating Frequency 83.3 MHz —
Process Technology 5 V CMOS, UV-EPROM CMOS (EPROM-based)
封装 84-pin ceramic J-lead (JM84) 84-pin PLCC (QCCJ, J-bend ceramic)
安装类型 Surface Mount (ceramic J-lead) —
工作温度范围 -55C to +125C (military grade) —
电源电压 [DATA_NEEDED: VCC range] —
Erase Method Ultraviolet (windowed ceramic package) —
Programming Method EPROM-style (programmer + UV erase) —
I/O Standard TTL-compatible CMOS —
Development Tool Altera MAX+PLUS II —
RoHS 状态 Non-compliant (ceramic with UV window) —
生命周期状态 Obsolete (EOL by Altera, now supported by Microchip / 3rd-party distributors) —
Device Family — MAX 5000 (EPM5192)
Dedicated Inputs — 7
Propagation Delay (Industry Variant) — 25 ns (per MicrochipUSA listing)
Supply Voltage (VCC) — 4.75 V to 5.25 V (nominal 5 V)
Programmability — UV-erasable window / OTP
Operating Temperature Grade — Commercial
Terminal Form — J-BEND
Package Code — QCCJ
Package Shape — SQUARE
Architecture — Programmable Logic Array + Macrocell Registers + PIA interconnect

数据手册与资源

浏览全部产品 创建 BOM 获取报价