EPM5192AQC100-15 vs EPM5192AGC84-20 对比
详细并排对比 EPM5192AQC100-15 出自 Altera 和 EPM5192AGC84-20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM5192AQC100-15 | EPM5192AGC84-20 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.95 | $41.20 |
| Manufacturer | Altera (now Intel) | — |
| Family | MAX 5000 | MAX 5000 |
| Device Type | UV-Erasable / OTP Complex PLD (CPLD) | — |
| Technology | CMOS | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | — |
| Propagation Delay (tPD) | 25 ns (-15 speed grade) | — |
| Total Inputs | 72 | — |
| Dedicated Inputs | 7 | 7 |
| User I/O Pins | 64 | 64 |
| External Clock Inputs | 1 | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| 封装 | 100-pin PQFP (R-PQFP-G100) | 84-pin Ceramic Pin Grid Array (CPGA, WPGA) |
| 安装类型 | Surface Mount | Through-Hole (Pin Grid Array socket) |
| Configuration Memory | EPROM (UV-erasable, OTP) | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance] |
| 工作温度 | [DATA_NEEDED: operating temperature range] | — |
| Product Type | — | Complex Programmable Logic Device (CPLD) |
| Logic Gates (typical) | — | [DATA_NEEDED: typical gate count] |
| Maximum Clock Frequency (fMAX) | — | 66.7 MHz |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Speed Grade | — | -20 |
| Package Code | — | WPGA |
| Erasure Method | — | UV-Erasable (with OTP window) |
| Process Technology | — | CMOS |
| Operating Temperature Grade | — | Commercial |
| 电源电压 | — | [DATA_NEEDED: VCC range] |
| I/O Standard | — | 5V CMOS / TTL compatible |