EPM5192GM-2 vs EPM5192GM 对比

详细并排对比 EPM5192GM-2 出自 Intel 和 EPM5192GM 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192GM-2 EPM5192GM
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $92.00 $58.00
Family Altera MAX 5000 —
Device Type EPLD (Erasable Programmable Logic Device) UV Erasable Programmable Logic Device (PLD)
Macrocell Count 192 —
Logic Elements [DATA_NEEDED: logic element count for MAX 5000 family] —
Propagation Delay (tPD) 55 ns —
Speed Grade -2 —
Process Technology CMOS —
Programmability UV-erasable (windowed package) —
封装 PGA-84 (Ceramic Pin Grid Array, windowed) CPGA-84 (Ceramic Pin Grid Array, 84 pins, windowed)
引脚数量 84 —
安装类型 Through-hole (PGA socket) Through-Hole (PGA)
工作温度 [DATA_NEEDED: military/industrial grade temperature range] [DATA_NEEDED: commercial/industrial/military grade]
电源电压 [DATA_NEEDED: VCC nominal, typically 5 V for MAX 5000] [DATA_NEEDED: typical VCC range]
RoHS 状态 [DATA_NEEDED: ceramic PGA with UV window is typically non-RoHS - verify with manufacturer] Non-compliant (contains lead in ceramic PGA)
Datasheet Page Count 52 —
Product Family — MAX 5000
Technology — CMOS
Number of Macrocells — 192
Usable Gates — 3,750
Pin-to-Pin Delay (tPD) — 15 ns (fastest speed grade); 55 ns (this part)
Counter Frequency (fCNT) — up to 76.9 MHz
Propagation Delay (tPD, this part) — 55 ns
Erasure Method — UV (windowed ceramic package)
Maximum User I/O — [DATA_NEEDED: exact I/O count for CPGA-84]
Process Node — [DATA_NEEDED: CMOS process geometry]
Programming Interface — JTAG-compatible (per MAX 5000 family)

数据手册与资源

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