EPM5192LC-25 vs EPM5192LC 对比
详细并排对比 EPM5192LC-25 出自 Altera 和 EPM5192LC 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM5192LC-25 | EPM5192LC |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $55.00 | $28.40 |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 5000 | MAX 7000S |
| Macrocells | 192 | 192 |
| Logic Elements | 192 (1 macrocell ≈ 1 LE in MAX 5000 architecture) | — |
| Pin-to-Pin Delay (tPD) | 25 ns | — |
| Speed Grade | -25 (25 ns) | — |
| 封装 | JLCC-84 (ceramic J-lead chip carrier) | JLCC-68 (windowed ceramic, LC suffix) |
| 安装类型 | Surface Mount | Surface Mount |
| Programmable Technology | UV-erasable / OTP (EPROM-based) | — |
| Programming Interface | JTAG / Altera programming hardware (legacy) | JTAG (ByteBlaster-compatible) |
| 工作温度 | 0C to +70C (commercial) | — |
| 电源电压 | 5 V (typical, MAX 5000) | — |
| I/O Standard | TTL-compatible | — |
| Configuration Memory | Non-volatile EPROM (on-chip) | — |
| Manufacturer | Altera Corporation (now Intel PSG) | — |
| RoHS 状态 | Unknown (legacy ceramic package typically non-RoHS) | [DATA_NEEDED: RoHS status] |
| Logic Array Blocks (LABs) | — | 12 |
| User I/O Pins | — | 64 |
| Dedicated Inputs | — | 7 |
| Global Clock Inputs | — | 1 |
| Propagation Delay (tPD) | — | 55 ns (typical, commercial) |
| Maximum Clock Frequency (fMAX) | — | 50 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (nominal 5 V) |
| Process Technology | — | CMOS, UV-erasable/OTP EPROM configuration |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA), fixed delay |
| Boundary-Scan Support | — | JTAG IEEE 1149.1 |
| Operating Temperature (commercial) | — | 0C to +70C |