EPM5192LC2 vs EPM5192LC 对比
详细并排对比 EPM5192LC2 出自 Intel 和 EPM5192LC 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM5192LC2 | EPM5192LC |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $17.40 | $28.40 |
| Family | MAX 5000 | MAX 7000S |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocells | 192 | 192 |
| User I/O Pins | 64 | 64 |
| Logic Array Blocks (LABs) | 12 | 12 |
| Dedicated Inputs | 7 | 7 |
| External Clock Inputs | 1 | — |
| Propagation Delay (tpd) | 45 ns (LC-2 speed grade) | — |
| 最大时钟频率 | 50 MHz | — |
| Supply Voltage (VCC) | 5 V | 4.75 V to 5.25 V (nominal 5 V) |
| Process Technology | CMOS | CMOS, UV-erasable/OTP EPROM configuration |
| 封装 | PQCC-84 (84-pin Plastic J-Lead Chip Carrier) | JLCC-68 (windowed ceramic, LC suffix) |
| 安装类型 | Surface Mount | Surface Mount |
| 工作温度 | [DATA_NEEDED: operating temperature range] | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | Programmable Interconnect Array (PIA), fixed delay |
| Reprogrammability | Windowed UV-erasable (ceramic package variants) / One-time programmable (plastic) | — |
| Global Clock Inputs | — | 1 |
| Propagation Delay (tPD) | — | 55 ns (typical, commercial) |
| Maximum Clock Frequency (fMAX) | — | 50 MHz |
| Boundary-Scan Support | — | JTAG IEEE 1149.1 |
| Programming Interface | — | JTAG (ByteBlaster-compatible) |
| Operating Temperature (commercial) | — | 0C to +70C |
| RoHS 状态 | — | [DATA_NEEDED: RoHS status] |