EPM5192LI-1 vs EPM5192LI84 对比

详细并排对比 EPM5192LI-1 出自 Altera 和 EPM5192LI84 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192LI-1 EPM5192LI84
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $16.40 $21.60
Family MAX 5000 —
Device Type EPLD (UV-Erasable/OTP Complex PLD) —
Usable Gates 3,750 3,750 gates
Macrocells 192 —
Maximum Toggle Frequency 40 MHz 40 MHz
电源电压 5 V —
Propagation Delay (tPD) [DATA_NEEDED: tPD in ns at -1 grade] —
User I/O Pins [DATA_NEEDED: user I/O count for JLCC variant] 64 (max)
Package Type JLCC (windowed, ceramic, UV-erasable) 84-pin PLCC (J-lead, package code J84/QCCJ)
Process Technology CMOS EPROM, UV-erasable —
Speed Grade -1 —
工作温度 [DATA_NEEDED: industrial vs military range] —
引脚数量 [DATA_NEEDED: pin count of LI package] —
安装类型 Surface Mount (JLCC with J-leads) Surface Mount (socket-compatible)
MSL 等级 [DATA_NEEDED: MSL level] —
RoHS 状态 [DATA_NEEDED: RoHS status of ceramic LI variant] [DATA_NEEDED: RoHS compliance status]
Lead Free [DATA_NEEDED: lead-free] —
Programmable Interconnect Programmable Interconnect Array (PIA) —
Architecture EEPROM/EPROM-based, non-volatile, instant-on —
Device Family — MAX 5000
Product Type — UV-Erasable/OTP Complex PLD (CPLD)
Macro Cells — 192
Pin-to-Pin Delay (tPD) — 25 ns
Supply Voltage (VCC) — 5 V (single supply)
工作温度范围 — -40 °C to +85 °C (industrial)
Configuration Memory — OTP / UV-erasable EPROM
Programming Method — Stand-alone programmer (no JTAG on LI84 OTP variant)
Logic Compatibility — TTL-compatible I/O

数据手册与资源

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