EPM5192LI-1 vs EPM5192LI84 Comparison

Detailed side-by-side comparison of EPM5192LI-1 by Altera and EPM5192LI84 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192LI-1 EPM5192LI84
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $16.40 $21.60
Family MAX 5000 β€”
Device Type EPLD (UV-Erasable/OTP Complex PLD) β€”
Usable Gates 3,750 3,750 gates
Macrocells 192 β€”
Maximum Toggle Frequency 40 MHz 40 MHz
Supply Voltage 5 V β€”
Propagation Delay (tPD) [DATA_NEEDED: tPD in ns at -1 grade] β€”
User I/O Pins [DATA_NEEDED: user I/O count for JLCC variant] 64 (max)
Package Type JLCC (windowed, ceramic, UV-erasable) 84-pin PLCC (J-lead, package code J84/QCCJ)
Process Technology CMOS EPROM, UV-erasable β€”
Speed Grade -1 β€”
Operating Temperature [DATA_NEEDED: industrial vs military range] β€”
Pin Count [DATA_NEEDED: pin count of LI package] β€”
Mounting Type Surface Mount (JLCC with J-leads) Surface Mount (socket-compatible)
MSL Level [DATA_NEEDED: MSL level] β€”
RoHS Status [DATA_NEEDED: RoHS status of ceramic LI variant] [DATA_NEEDED: RoHS compliance status]
Lead Free [DATA_NEEDED: lead-free] β€”
Programmable Interconnect Programmable Interconnect Array (PIA) β€”
Architecture EEPROM/EPROM-based, non-volatile, instant-on β€”
Device Family β€” MAX 5000
Product Type β€” UV-Erasable/OTP Complex PLD (CPLD)
Macro Cells β€” 192
Pin-to-Pin Delay (tPD) β€” 25 ns
Supply Voltage (VCC) β€” 5 V (single supply)
Operating Temperature Range β€” -40 Β°C to +85 Β°C (industrial)
Configuration Memory β€” OTP / UV-erasable EPROM
Programming Method β€” Stand-alone programmer (no JTAG on LI84 OTP variant)
Logic Compatibility β€” TTL-compatible I/O

Datasheets & Resources

Browse All Products Create BOM Request Quote