EPM570GT100I5 vs EPM570F100I5N 对比
详细并排对比 EPM570GT100I5 出自 Altera 和 EPM570F100I5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM570GT100I5 | EPM570F100I5N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $4.95 | $13.40 |
| Series | MAX II | — |
| Logic Elements (LE) | 570 | — |
| Macrocells | 440 | 440 |
| Maximum User I/O Pins | 76 | — |
| Propagation Delay (tPD) | 5.4 ns (typ) | 8.7 ns (max), 5.4 ns (typical) |
| Internal Supply Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| User I/O Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| User Flash Memory | 8 Kbits | 8 Kbits |
| Programmability | In-System Programmable (ISP) via JTAG, non-volatile flash | — |
| Configuration Time | Instant-On (< 1 ms, no external PROM required) | — |
| 工作温度 | -40 C to +100 C (Industrial, "I5") | -40C to +100C (Industrial) |
| 封装 | 100-pin TQFP (14x14 mm, 0.5 mm pitch) | 100-ball FineLine BGA (11x11 mm) |
| 安装类型 | Surface Mount (Gull-wing leads) | Surface Mount |
| Typical Active Current | [DATA_NEEDED: typical active ICC] | — |
| Speed Grade | GT (fast) | — |
| RoHS 状态 | Compliant | Compliant |
| JTAG Support | IEEE 1149.1 boundary scan | — |
| Global Clock Networks | 4 | — |
| Family | — | MAX II |
| Device Type | — | CPLD (Flash-based) |
| Logic Elements (LEs) | — | 570 |
| Maximum User I/Os | — | 76 |
| Maximum Operating Frequency | — | 304 MHz |
| Supply Voltage (VCCINT) | — | 2.375 V to 3.6 V |
| Typical Supply Current (ICC) | — | 55 mA |
| I/O Standards Supported | — | LVCMOS, LVTTL, LVDS, SSTL, HSTL (1.5/1.8/2.5/3.3 V) |
| Programming Interface | — | JTAG (IEEE 1149.1), in-system programmable |
| Global Clocks | — | 4 |
| Process Technology | — | CMOS, Flash configuration cell |
| Hot Socketing | — | Supported |