EPM570M100C5N vs EPM570ZM100I8N 对比

详细并排对比 EPM570M100C5N 出自 Intel 和 EPM570ZM100I8N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM570M100C5N EPM570ZM100I8N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $11.85 $16.50
Family MAX II —
Series EPM570 EPM570Z
Device Type CPLD (Complex Programmable Logic Device) —
Macrocell Count 440 —
Logic Elements 570 570
User I/Os 76 76
Number of Logic Blocks / Array Blocks [DATA_NEEDED: number of LABs] —
引脚数 100 —
封装 100-MBGA (FineLine BGA, 6 x 6 mm, 0.5 mm pitch) —
Maximum Frequency (fMAX) 201.1 MHz —
Pin-to-Pin Propagation Delay 5.4 ns —
Operating Supply Voltage (Core) 2.5 V / 3.3 V 1.8 V
I/O Voltage Support 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) —
On-Chip User Flash Memory (UFM) 8 Kbits —
Process Technology 0.18 um, 6-layer-metal flash —
Programming Interface JTAG (IEEE 1149.1) and ISP —
工作温度范围 0 C to +85 C (Commercial) -40 C to +85 C (Industrial)
安装类型 Surface Mount (BGA) —
RoHS 状态 Lead-Free / Compliant —
Moisture Sensitivity Level [DATA_NEEDED: MSL level] —
Device Family — MAX II
Number of Macrocells — 440
Number of Logic Array Blocks (LABs) — 57
Maximum Operating Frequency — 152 MHz
Propagation Delay (tPD) — 9 ns
Programming Technology — Flash, non-volatile
In-System Programmability (ISP) — Yes (JTAG)
Boundary Scan — IEEE 1149.1 (JTAG)
安装方式 — SMD/SMT
封装 / 外壳 — 100-ball FineLine BGA (MBGA, 0.8 mm pitch)
Packaging — Tray

数据手册与资源

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