EPM7128SLC84-10 vs EPM7096LC84-15 对比

详细并排对比 EPM7128SLC84-10 出自 Intel 和 EPM7096LC84-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM7128SLC84-10 EPM7096LC84-15
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.75 $9.85
Family MAX 7000S MAX 7000
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 128 —
Logic Gates 2500 —
User I/Os 68 —
Total Package Pins 84 —
封装 PLCC-84 (J-lead) —
Propagation Delay (tpd) 10 ns —
Maximum Operating Frequency 125 MHz 76.9 MHz
Internal Frequency 250 MHz —
Supply Voltage (VCCINT) 5 V —
MultiVolt I/O Support 2.5 V / 3.3 V / 5 V —
Program Memory Type EEPROM (in-system programmable) —
JTAG (IEEE 1149.1) Yes —
工作温度 0C to +70C (Commercial) 0C to +70C (commercial)
安装类型 Surface Mount (J-bend) Surface Mount
MSL 等级 [DATA_NEEDED: MSL level] —
RoHS 状态 Non-compliant (contains lead in PLCC) [DATA_NEEDED: RoHS compliance status]
Series — MAX 7000 (second-generation MAX architecture)
Macro Cells — 96
Logic Array Blocks (LABs) — 4
Usable Gates — 1,800
Pin-to-Pin Propagation Delay (tPD) — 15 ns
User I/O Pins — 68 (36 per LAB, [DATA_NEEDED: exact LAB-level split])
Supply Voltage (VCC) — 4.75 V to 5.25 V
Programmable Type — EE PLD (in-system programmable via JTAG)
Programming Interface — IEEE Std. 1149.1 JTAG
封装 / 外壳 — 84-PLCC (J-Lead)
Supplier Device Package — 84-PLCC (29.31 x 29.31 mm)
Data Retention — [DATA_NEEDED: data retention years]
Erase/Program Endurance — [DATA_NEEDED: erase/program cycle count]

数据手册与资源

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