EPM7256SQC208-15N vs EPM7256SQC208-7 对比
详细并排对比 EPM7256SQC208-15N 出自 Altera 和 EPM7256SQC208-7 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM7256SQC208-15N | EPM7256SQC208-7 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $0.00 | $0.00 |
| Series | MAX 7000S | — |
| Macrocells | 256 | 256 |
| User I/O Pins | 164 | 164 |
| Pin-to-Pin Delay | 15 ns (speed grade -15) | — |
| 电源电压 | 5 V | — |
| 封装 | 208-pin PQFP | 208-pin PQFP (28 x 28 mm, 0.5 mm pitch) |
| 安装类型 | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | — |
| JTAG Interface | IEEE 1149.1 boundary-scan | — |
| In-System Programmability | Yes (ISP) | Yes (IEEE 1149.1 JTAG) |
| 工作温度 | [DATA_NEEDED: operating temperature range] | — |
| RoHS 状态 | Lead free / RoHS Compliant | [DATA_NEEDED: RoHS status] |
| Logic Array Blocks | 16 macrocells per LAB | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Speed Grade | -15 | -7 (7.5 ns) |
| Product Category | CPLD - Complex Programmable Logic Devices | — |
| Manufacturer | Altera (Intel Programmable Solutions Group) | — |
| Device Family | — | MAX 7000S (EPM7256S) |
| Usable Gates | — | 5,000 |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Operating Frequency (fMAX) | — | 128.2 MHz |
| Supply Voltage (VCC) | — | 5.0 V |
| Configuration Technology | — | EEPROM (non-volatile) |
| 工作温度范围 | — | Commercial (0C to +70C) |
| Minimum DC Input Voltage | — | -0.5 V |
| Input Undershoot Tolerance | — | -2.0 V for <100 mA, <20 ns |
| MSL 等级 | — | [DATA_NEEDED: MSL level] |
| Logic Levels | — | 5.0 V CMOS/TTL compatible |