EPM9560RC208-18 vs EPM9560RC208-16 对比

详细并排对比 EPM9560RC208-18 出自 Altera 和 EPM9560RC208-16 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560RC208-18 EPM9560RC208-16
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 停产 不推荐新设计
库存状态 有库存 有库存
单价(USD) $0.00 $52.40
Device Family MAX 9000 (EPM9560) —
Logic Type EEPROM-based Complex Programmable Logic Device (CPLD) —
Usable Gates 12,000 gates 12,000 (typical)
Macrocells 560 macrocells —
Propagation Delay (tPD) 18 ns (speed grade -18) —
Maximum Operating Frequency 117.6 MHz (family -15 grade reference) —
电源电压 5 V —
I/O Voltage Compatibility 3.3 V or 5 V —
User I/O Lines 149 I/O lines —
Flip-Flops 772 flip-flops —
封装 208-pin RQFP (Power Quad Flat Pack) 208-pin Power Quad Flat Pack (RQFP)
Package JESD-30 Code S-PQFP-G208 —
安装类型 Surface Mount Surface Mount
Configuration Memory EEPROM (non-volatile, no external config PROM) —
Technology CMOS —
工作温度 [DATA_NEEDED: operating temperature range] [DATA_NEEDED: industrial/commercial temperature grade]
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
生命周期状态 EOL / mature (per Altera product discontinuance notice) —
Family — MAX 9000
Device Type — CPLD (Complex Programmable Logic Device)
Logic Elements / Macrocells — 560 macrocells
Typical Gates — 12,000 gates
Pin-to-Pin Delay (tPD) — 16 ns
Maximum Internal Frequency (fMAX) — 117.6 MHz
Supply Voltage (VCCINT / VCCIO) — 5 V
User I/O Pins — 416
Process Technology — 0.35 µm CMOS EEPROM
Programmability — In-system via JTAG (IEEE 1149.1)
Speed Grade — -16

数据手册与资源

浏览全部产品 创建 BOM 获取报价