EPM9560RC304-15 vs EPM9560RC304C-3 对比

详细并排对比 EPM9560RC304-15 出自 Altera 和 EPM9560RC304C-3 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560RC304-15 EPM9560RC304C-3
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.40 $95.00
Device Family MAX 9000 —
Architecture Multiple Array MatriX (MAX), EEPROM-based —
Macrocells 560 —
Logic Array Blocks (LABs) 16 —
User I/O Pins 212 (maximum) 212
Propagation Delay (tPD) 15 ns (combinatorial, pin-to-pin) —
引脚数量 304 304
封装 304-pin RQFP (Plastic Quad Flat Pack) RBGGA-304 (Ceramic Ball Grid Array)
Supply Voltage (VCCINT) 5.0 V —
I/O Standard 5.0 V TTL / PCI-compliant —
In-System Programmability Yes, via IEEE Std. 1149.1 JTAG —
Configuration Memory On-chip EEPROM (non-volatile) —
Technology Node High-performance CMOS, EEPROM process —
工作温度 [DATA_NEEDED: industrial/commercial temperature grade] 0 C to +70 C (Commercial)
安装类型 Surface Mount Surface Mount (BGA)
RoHS 状态 [DATA_NEEDED: lead-free / RoHS compliance status] unknown (legacy part, pre-RoHS era)
Family — MAX 9000
Device Type — CPLD (EPLD)
Macrocells (Logic Elements) — 560
Usable Gates — 12,000
Speed Grade — -3 (3 ns pin-to-pin, commercial)
电源电压 — 5 V
Programmability — In-system, non-volatile EEPROM
JTAG Support — IEEE 1149.1 boundary-scan
Logic Blocks — Logic Array Blocks (LABs) with PIA interconnect

数据手册与资源

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