EPM9560RI208-10N vs EPM9320RI208-20N 对比
详细并排对比 EPM9560RI208-10N 出自 Altera 和 EPM9320RI208-20N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM9560RI208-10N | EPM9320RI208-20N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $61.75 | $0.00 |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Architecture | CMOS EEPROM-based Multiple Array MatriX (MAX) | — |
| Usable Gates | 12,000 | — |
| Macro Cells | 560 | — |
| Register Bits | 12,160 | — |
| User I/Os | 212 | — |
| Pin-to-Pin Delay | 10 ns (speed grade -10) | — |
| Maximum Frequency | 100 MHz to 125 MHz | — |
| 电源电压 | 5 V | — |
| 封装 | 208-pin RQFP (PQFP) | 208-pin PQFP (Plastic Quad Flat Pack) |
| 工作温度 | -40C to +85C (Industrial grade, "RI" suffix) | — |
| Programming Method | In-system via IEEE 1149.1 (JTAG) | — |
| MSL 等级 | 3 (168 Hours) | — |
| RoHS 状态 | ROHS3 Compliant (per fpgalink) | [DATA_NEEDED: RoHS status] |
| Configuration Memory | On-chip EEPROM (non-volatile) | EEPROM (non-volatile) |
| Device Family | — | MAX 9000 (EPM9320) |
| Logic Type | — | EEPROM-based Complex Programmable Logic Device (CPLD) |
| Macrocells | — | 320 |
| Flip-Flops | — | 484 |
| Propagation Delay (tPD) | — | 20 ns |
| Supply Voltage (VCC) | — | 5.0 V |
| I/O Voltage Tolerance | — | 3.3 V or 5 V configurable |
| Package Lead Pitch | — | 0.500 mm |
| Number of Terminals | — | 208 |
| 工作温度范围 | — | -40C to +85C (Industrial) |
| In-System Programmability | — | Yes, 5.0 V ISP via JTAG |
| JTAG Interface | — | IEEE Std. 1149.1 compliant |
| Dedicated Input Pins | — | 4 (low-skew global distribution) |
| Minimum DC Input on I/O Pins | — | -0.5 V |
| Minimum DC Input on Dedicated Inputs | — | -0.3 V |
| Input Undershoot/ Overshoot | — | -2.0 V / 7.0 V for <20 ns (no-load) |
| 安装类型 | — | Surface Mount |