EPM9560RI208-15 vs EPM9560RI208-10N 对比

详细并排对比 EPM9560RI208-15 出自 Intel 和 EPM9560RI208-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560RI208-15 EPM9560RI208-10N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $20.10 $61.75
Family MAX 9000 MAX 9000
Architecture CMOS EEPROM-based Multiple Array MatriX (MAX) CMOS EEPROM-based Multiple Array MatriX (MAX)
Macrocells 560 —
Typical Usable Gates 12,000 —
User I/Os 153 212
Internal Frequency (max) 145 MHz —
Propagation Delay (tPD) 11.4 ns (commercial); 15 ns speed grade —
Logic Family CMOS —
引脚数 208 —
Package Code HFQFP (Power Quad Flat Pack, gull-wing) —
Package Type RQFP-208 —
Supply Voltage (VCC) 5 V nominal (4.5 V to 5.5 V) —
I/O Voltage Support 3.3 V or 5 V multi-volt I/O —
工作温度 0 °C to 70 °C (industrial grade; per package suffix R) -40C to +85C (Industrial grade, "RI" suffix)
In-System Programmability Yes (JTAG / IEEE 1149.1) —
Boundary-Scan (JTAG) Compliant —
Configuration Memory On-chip EEPROM (non-volatile) On-chip EEPROM (non-volatile)
RoHS 状态 ROHS3 Compliant ROHS3 Compliant (per fpgalink)
湿敏等级(MSL) 3 (168 hours) —
Device Type — CPLD (Complex Programmable Logic Device)
Usable Gates — 12,000
Macro Cells — 560
Register Bits — 12,160
Pin-to-Pin Delay — 10 ns (speed grade -10)
Maximum Frequency — 100 MHz to 125 MHz
电源电压 — 5 V
封装 — 208-pin RQFP (PQFP)
Programming Method — In-system via IEEE 1149.1 (JTAG)
MSL 等级 — 3 (168 Hours)

数据手册与资源

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