EPM9560RI208-15 vs EPM9560RI208-10N Comparison

Detailed side-by-side comparison of EPM9560RI208-15 by Intel and EPM9560RI208-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560RI208-15 EPM9560RI208-10N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $20.10 $61.75
Family MAX 9000 MAX 9000
Architecture CMOS EEPROM-based Multiple Array MatriX (MAX) CMOS EEPROM-based Multiple Array MatriX (MAX)
Macrocells 560 β€”
Typical Usable Gates 12,000 β€”
User I/Os 153 212
Internal Frequency (max) 145 MHz β€”
Propagation Delay (tPD) 11.4 ns (commercial); 15 ns speed grade β€”
Logic Family CMOS β€”
Number of Pins 208 β€”
Package Code HFQFP (Power Quad Flat Pack, gull-wing) β€”
Package Type RQFP-208 β€”
Supply Voltage (VCC) 5 V nominal (4.5 V to 5.5 V) β€”
I/O Voltage Support 3.3 V or 5 V multi-volt I/O β€”
Operating Temperature 0 Β°C to 70 Β°C (industrial grade; per package suffix R) -40C to +85C (Industrial grade, "RI" suffix)
In-System Programmability Yes (JTAG / IEEE 1149.1) β€”
Boundary-Scan (JTAG) Compliant β€”
Configuration Memory On-chip EEPROM (non-volatile) On-chip EEPROM (non-volatile)
RoHS Status ROHS3 Compliant ROHS3 Compliant (per fpgalink)
Moisture Sensitivity Level (MSL) 3 (168 hours) β€”
Device Type β€” CPLD (Complex Programmable Logic Device)
Usable Gates β€” 12,000
Macro Cells β€” 560
Register Bits β€” 12,160
Pin-to-Pin Delay β€” 10 ns (speed grade -10)
Maximum Frequency β€” 100 MHz to 125 MHz
Supply Voltage β€” 5 V
Package β€” 208-pin RQFP (PQFP)
Programming Method β€” In-system via IEEE 1149.1 (JTAG)
MSL Level β€” 3 (168 Hours)

Datasheets & Resources

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