EPM9560WC208-20 vs EPM9560WC208-20C 对比

详细并排对比 EPM9560WC208-20 出自 Altera 和 EPM9560WC208-20C 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560WC208-20 EPM9560WC208-20C
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $25.80 $140.00
Family MAX 9000 —
Device Type CPLD (EPLD) —
Macrocells 560 560
Logic Array Blocks (LABs) 35 35
User I/O Pins 149 149
Maximum Propagation Delay (tPD) 23.6 ns —
封装 PQFP-208 (RQFP/WQFP) 208-pin CQFP (Ceramic Quad Flat Pack)
Process Technology CMOS, EEPROM-based CMOS, Electrically Erasable
Supply Voltage (VCCINT) 5 V (typical, see datasheet) —
I/O Voltage (VCCIO) 3.3 V or 5 V (multi-voltage I/O) —
In-System Programmability Yes, JTAG BST (IEEE 1149.1) —
Pin/Package Suffix W = power PQFP; -20 = 23.6 ns speed grade —
工作温度 Commercial (0C to +70C) [DATA_NEEDED: exact temp grade] —
安装类型 Surface Mount Surface Mount (Ceramic QFP)
RoHS 状态 Non-compliant (legacy PQFP) [DATA_NEEDED: confirm from official doc] ROHS3 Compliant (per fpgalink listing)
Lead-Free [DATA_NEEDED] —
无卤 [DATA_NEEDED] —
MSL 等级 [DATA_NEEDED] —
Device Family — MAX 9000 (EE PLD)
Series — EPM9560
Propagation Delay (tPD) — 20 ns
最大时钟频率 — [DATA_NEEDED: fMAX value not in verified data]
电源电压 — 3.3 V or 5 V (configurable I/O)
引脚数量 — 208
Programming Interface — JTAG BST (in-system programmable)
Operating Temperature Grade — Commercial (C suffix)
Moisture Sensitivity Level — MSL 3 (168 Hours)

数据手册与资源

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