H5ANAG6NBJR-RDC vs H5ANAG8NBJR-RDC 对比
详细并排对比 H5ANAG6NBJR-RDC 出自 SK hynix 和 H5ANAG8NBJR-RDC 出自 SK hynix。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | H5ANAG6NBJR-RDC | H5ANAG8NBJR-RDC |
|---|---|---|
| 品牌 | SK hynix | SK hynix |
| 分类 | DRAM | DRAM |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.60 | $3.55 |
| 存储器类型 | DDR4 SDRAM | DDR4 SDRAM |
| Memory Organization | 16Gb x16 | — |
| Density | 16 Gb | 16 Gbit |
| 数据速率 | 2666 Mbps (speed grade -RDC) | — |
| Supply Voltage (VDD) | 1.2 V | 1.2 V |
| 接口 | Synchronous, double data rate | SSTL12 |
| Clocking | Fully synchronous to both clock edges | — |
| 封装 | FBGA (Ball Grid Array), surface mount | 78-ball FBGA |
| 安装类型 | Surface Mount | Surface Mount |
| Technology | CMOS | — |
| Standard | JEDEC DDR4 SDRAM | — |
| Application | Main memory | — |
| 工作温度 | [DATA_NEEDED: Operating Temperature Range] | [DATA_NEEDED: Operating Temperature Range] |
| On-Die Termination (ODT) | Supported (DDR4 feature) | — |
| Bank Group Architecture | DDR4 bank groups (per JEDEC DDR4) | — |
| RoHS 状态 | [DATA_NEEDED: RoHS Status] | Compliant (lead-free PBGA per family product data) |
| 存储组织 | — | 2G x 8 |
| I/O Voltage (VDDQ) | — | 1.2 V |
| Speed Grade (suffix R) | — | DDR4-2666 class |
| Refresh | — | Self-refresh and auto-refresh (8K/64ms class per family datasheet) |
| Bank Groups | — | 4 (per 16Gb DDR4 family datasheet) |
| Data Strobe | — | DQS with read/write training |
| Data Bus Inversion | — | Supported (DBI) |
| CAS 延迟 | — | [DATA_NEEDED: CAS Latency] |
| 生命周期状态 | — | Active |