LTC2256CUJ-14 vs LTC2150CUJ-14 对比

详细并排对比 LTC2256CUJ-14 出自 Analog Devices 和 LTC2150CUJ-14 出自 Analog Devices。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Analog Devices
LTC2256CUJ-14 LTC2256CUJ-14 - 14-Bit 25Msps Ultralow Power 1.8V ADC | ADI

LTC2256CUJ-14 - 14-Bit 25Msps Ultralow Power 1.8V ADC | ADI

LTC2256CUJ-14 ✓ 量产中
Analog Devices
LTC2150CUJ-14 LTC2150CUJ-14 - 14-Bit 170Msps 1.8V ADC DDR LVDS | Analog Devices

LTC2150CUJ-14 - 14-Bit 170Msps 1.8V ADC DDR LVDS | Analog Devices

LTC2150CUJ-14 ✓ 量产中

规格对比

参数 LTC2256CUJ-14 LTC2150CUJ-14
品牌 Analog Devices Analog Devices
分类 ADC/DAC ADC/DAC
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $6.90 $41.58
分辨率 14 bit 14 bit
Sample Rate 25 Msps 170 Msps
Number of Inputs 1 —
Architecture Pipelined Pipelined
电源电压 1.8 V (single) —
Power Dissipation 35 mW at 25 Msps —
INL ±1 LSB (typical) —
DNL ±0.3 LSB (typical) —
Transition Noise 1.13 LSB RMS 1.82 LSBRMS
SNR 73 dB —
Input Bandwidth (Full Power) 800 MHz —
Input Range 1 Vp-p to 2 Vp-p (selectable, differential) —
Digital Output Modes Full-rate CMOS, DDR CMOS, DDR LVDS (selectable) —
Output Supply Range (CMOS) 1.2 V to 1.8 V —
封装 40-QFN (6 mm x 6 mm) 40-QFN (6 mm × 6 mm) with exposed pad
Pin/Package Code UJ (QFN-40, 6x6 mm) —
Configuration Interface Serial SPI port Serial SPI port
Power-Saving Modes Nap mode, full shutdown Sleep and Nap modes
Optional Features Clock duty-cycle stabilizer, data output randomizer —
工作温度 0C to +70C (commercial C-grade) —
安装类型 Surface Mount Surface Mount
RoHS 状态 Compliant (PBF suffix) Compliant (Pb-free #PBF suffix)
Number of Channels — 1
Analog Supply Voltage — 1.7 V to 1.9 V (1.8 V nominal)
Digital Supply Voltage — 1.7 V to 1.9 V (1.8 V nominal)
INL (typical) — ±0.85 LSB
DNL (typical) — ±0.25 LSB
Missing Codes — None over temperature
Full-Power Sample/Hold Bandwidth — 1.25 GHz
Digital Output Interface — DDR LVDS
Encode Clock Inputs — Differential ENC+/ENC- (sine, PECL, LVDS, TTL, CMOS)
Clock Duty-Cycle Stabilizer — Optional (selectable)
Latency — 5 clock cycles

数据手册与资源

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