AD7623ASTZRL - 16-Bit 1.33 MSPS PulSAR ADC | Analog Devices
料号： AD7623ASTZRL ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $28.5 | $28.50 |
| 10 | $25.78 | $257.80 |
| 100 | $23.12 | $2,312.00 |
| 500 | $20.85 | $10,425.00 |
| 1,000 | $18.9 | $18,900.00 |
AD7623ASTZRL 概述
A SAR ADC is a type of analog-to-digital converter that uses a charge redistribution capacitive DAC combined with a comparator and successive-approximation logic to digitize an analog input in N clock cycles, where N equals the converter's resolution. SAR ADCs sit in the broader taxonomy of data converters (ADC -> Nyquist-rate ADC -> SAR ADC -> mixed-signal IC). Unlike delta-sigma ADCs, SAR converters offer single-shot latency, deterministic throughput, and no pipeline delay, which makes them ideal for multiplexing multi-channel systems and control loops where latency must be predictable.
Key performance highlights include 1.33 MSPS throughput, 16-bit resolution with no missing codes, an excellent linearity profile, and a wide common-mode input range supported by the fully differential architecture. The AD8021 op amp is recommended by Analog Devices as the input driver because it settles cleanly at 16-bit levels at high gain. Combined with the 2.048 V internal reference, the AD7623 offers a high-accuracy single-supply solution for industrial instrumentation, medical imaging front-ends, and spectrum analysis systems.
Typical applications include industrial process control and data acquisition, medical imaging (CT, ultrasound, MRI front-ends), spectrum analysis and vibration analysis, multi-channel multiplexed data acquisition systems, and precision instrumentation where deterministic latency matters.
When designing with the AD7623, pay close attention to the input driver selection - the op amp must settle at 16-bit resolution (0.0015%) within the ADC acquisition time, not just at 0.1% or 0.01% which is more commonly published. Use a low-inductance ground plane and decouple the 2.5 V supply close to the pins. The LQFP-48 package has a typical θJA around 50 C/W; thermal rise is modest given the low supply current.
This page synthesizes distributor pricing, drop-in alternatives within the PulSAR family, and design notes drawn from the Analog Devices AD7623 datasheet - content not consolidated on any single distributor page.
直接替换替代料： AD7623ASTZRL ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： AD7623ASTZRL （相同外形与封装尺寸） ——差异在于 Architecture, Input Type, Package, Operating Temperature Range, Resolution.
快速对比工具——选择替代料号进行并排对比：
AD7623ACPZRL
✅ 直接替换✓ 有现货
$20.8 / 个
查看数据手册 →AD7623ASTZ
✅ 直接替换📋 参考替代料（不在目录中）
AD7622BSTZ
✅ 直接替换📋 参考替代料（不在目录中）
AD7623ASTZRL 最大额定值与电气特性
| 分辨率 | 16 bit |
| Sample Rate | 1.33 MSPS |
| Architecture | SAR (charge redistribution) |
| 电源电压 | 2.5 V (single) |
| Internal Reference | 2.048 V (typical ±7 ppm/°C drift) |
| Input Type | Fully differential analog input |
| Digital Interface | Parallel / Serial |
| Missing Codes | No missing codes at 16-bit level |
| 封装 | 48-pin LQFP (LFQFP) |
| 安装类型 | Surface Mount |
| 工作温度范围 | -40 °C to +85 °C (industrial) |
| Terminal Form | GULL WING |
| Package Code | LFQFP |
| Package Shape | SQUARE |
| Number of Terminals | 48 |
| Temperature Grade | INDUSTRIAL |
| RoHS 状态 | Compliant |
AD7623ASTZRL 引脚配置
| 引脚 1 | DVDD — Digital supply voltage (2.5 V) |
| 引脚 2 | DGND — Digital ground |
| 引脚 3 | OBD — Out-of-Bound detection output |
| 引脚 4 | CS — Chip Select input |
| 引脚 5 | RD — Read input (parallel mode) |
| 引脚 6 | WR — Write / Start conversion input |
| 引脚 7 | BUSY — Busy output (high during conversion) |
| 引脚 8 | D15 — Parallel data output bit 15 (MSB) |
| 引脚 9 | D14 — Parallel data output bit 14 |
| 引脚 10 | D13 — Parallel data output bit 13 |
| 引脚 11 | D12 — Parallel data output bit 12 |
| 引脚 12 | D11 — Parallel data output bit 11 |
| 引脚 13 | D10 — Parallel data output bit 10 |
| 引脚 14 | D9 — Parallel data output bit 9 |
| 引脚 15 | D8 — Parallel data output bit 8 |
| 引脚 16 | DGND — Digital ground |
| 引脚 17 | D7 — Parallel data output bit 7 |
| 引脚 18 | D6 — Parallel data output bit 6 |
| 引脚 19 | D5 — Parallel data output bit 5 |
| 引脚 20 | D4 — Parallel data output bit 4 |
| 引脚 21 | D3 — Parallel data output bit 3 |
| 引脚 22 | D2 — Parallel data output bit 2 |
| 引脚 23 | D1 — Parallel data output bit 1 |
| 引脚 24 | D0 — Parallel data output bit 0 (LSB) |
| 引脚 25 | SDOUT — Serial data output (serial mode) |
| 引脚 26 | SCLK — Serial clock (serial mode) |
| 引脚 27 | SER/PAR — Interface mode select |
| 引脚 28 | RESET — Reset input |
| 引脚 29 | PD — Power-down input |
| 引脚 30 | REF — Reference decoupling / external reference input |
| 引脚 31 | REFSENSE — Reference sense / select |
| 引脚 32 | REFGND — Reference ground |
| 引脚 33 | AVDD — Analog supply (2.5 V) |
| 引脚 34 | AGND — Analog ground |
| 引脚 35 | IN+ — Differential analog input positive |
| 引脚 36 | IN- — Differential analog input negative |
| 引脚 37 | AGND — Analog ground |
| 引脚 38 | AVDD — Analog supply (2.5 V) |
| 引脚 39 | CAPB — Reference buffer bypass capacitor |
| 引脚 40 | CAPA — Reference buffer bypass capacitor |
| 引脚 41 | REFOUT — Internal 2.048 V reference output |
| 引脚 42 | REFGND — Reference ground |
| 引脚 43 | DGND — Digital ground |
| 引脚 44 | DVDD — Digital supply (2.5 V) |
| 引脚 45 | NC — Not connected |
| 引脚 46 | NC — Not connected |
| 引脚 47 | NC — Not connected |
| 引脚 48 | NC — Not connected |
典型应用
AD7623ASTZRL 适用于 6 应用s: Industrial Data Acquisition, Medical Imaging Front-End, Spectrum and Vibration Analysis, Precision Instrumentation, Multiplexed Multi-Channel Systems, Automatic Test Equipment (ATE).
Industrial Data Acquisition
The AD7623ASTZRL's 1.33 MSPS throughput and 16-bit no-missing-code resolution make it a strong fit for multi-channel industrial data acquisition systems sampling sensor bridges, RTDs, and strain gauges. Its SAR architecture provides deterministic latency per channel so muxed channels report in a known time, simplifying host timing. The single 2.5 V supply and internal 2.048 V reference shrink the analog front-end, while the 48-LQFP footprint leaves room for aggressive PCB routing on dense 4- or 8-channel boards.
推荐
Medical Imaging Front-End
In medical imaging front-ends (CT, MRI receiver, ultrasound beamformer pre-DSP), the AD7623ASTZRL delivers the dynamic range and channel-to-channel synchronization demanded by high-resolution reconstruction. The 16-bit SAR core offers single-shot latency so beamformed samples align deterministically; the fully differential input rejects common-mode noise from long sensor cables. Using the AD8021 driver preserves 16-bit linearity at the front-end and avoids dynamic-range loss that would otherwise lower image contrast.
推荐
Spectrum and Vibration Analysis
FFT-based spectrum and vibration analyzers depend on high dynamic range and clean spurious performance; the AD7623ASTZRL's 16-bit no-missing-code linearity keeps SFDR and SNR within usable bounds for vibration analysis on motors, bearings, and structural-health sensors. The 1.33 MSPS sample rate supports analysis up to ~600 kHz of input bandwidth under Nyquist. Pairing with an external anti-alias filter and the AD8021 driver creates a precision front-end with deterministic timing for synchronous sampling across multiple accelerometers.
推荐
Precision Instrumentation
Bench-top precision instruments - DMMs, source-measure units, calibration equipment - benefit from the AD7623ASTZRL's 16-bit SAR performance and single 2.5 V supply that reduces rail-count and thermal footprint inside tightly-packaged instruments. The internal ±7 ppm/°C reference gives good temperature stability without external reference overhead. The 48-LQFP package allows dense layout next to the analog front-end while keeping digital lines short, which is critical for EMI-sensitive measurement chains.
推荐
Multiplexed Multi-Channel Systems
In multiplexed data acquisition systems scanning 8, 16, or more channels, the AD7623ASTZRL's SAR architecture avoids the latency penalty of pipeline ADCs so each channel is sampled in a known number of clock cycles. The 1.33 MSPS throughput combined with an external mux like the ADG1408 supports aggregate per-channel rates well above 100 kSPS even on 8-channel boards. The parallel output mode gives lowest deterministic latency, while the serial mode simplifies opto-isolation in industrial systems where channel count is high.
推荐
Automatic Test Equipment (ATE)
ATE systems for semiconductor test need fast, deterministic ADC conversion to keep per-pin test times short. The AD7623ASTZRL's 1.33 MSPS SAR throughput, 16-bit no-missing-code resolution, and parallel output mode fit the per-device parametric test pattern where each channel must produce a settled result in microseconds. The single 2.5 V supply simplifies ATE pin-electronics power trees, and the integrated 2.048 V reference removes one external component from the BOM - a meaningful saving on multi-site test heads.
推荐
推荐产品汇总
工程参考数据： AD7623ASTZRL ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | AD7623ACPZRL | AD7623ASTZ | AD7622BSTZ |
|---|---|---|---|---|
| Package | 48-LQFP (LFQFP) | 48-LQFP (LFQFP) - same | 48-LQFP (LFQFP) - same | 48-LQFP (LFQFP) - same |
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Resolution | 16 bit | 16 bit | 16 bit | 16 bit |
| Sample Rate | 1.33 MSPS | 1.33 MSPS | 1.33 MSPS | 0.5 MSPS |
| Architecture | SAR | SAR | SAR | SAR |
| Supply Voltage | 2.5 V single | 2.5 V single | 2.5 V single | 2.5 V single |
| Internal Reference | 2.048 V internal | 2.048 V internal | 2.048 V internal | 2.048 V internal |
| Digital Interface | Parallel / Serial | Parallel / Serial | Parallel / Serial | Parallel / Serial |
| Operating Temperature | -40 °C to +85 °C | Different temp grade; verify | -40 °C to +85 °C | -40 °C to +85 °C |
关键差异点
- 1.33 MSPS is the fastest PulSAR speed grade in the 48-LQFP family （对比 AD7622BSTZ)
- No missing codes at 16-bit level （对比 AD7622BSTZ)
- Single 2.5 V supply with internal reference simplifies BOM （对比 External reference designs)
设计说明
The input driver op amp must settle at the 16-bit level (0.0015%) within the ADC acquisition time - NOT the 0.1% or 0.01% level commonly published on amplifier datasheets. The AD8021 is the recommended driver because it maintains this settling even at gain of 10. Verify driver settling with the actual signal swing, not just datasheet typical values.
Place decoupling capacitors directly on AVDD, DVDD, and REFOUT pins using a low-inductance ground plane. Separate analog (AGND, REFGND) and digital (DGND) grounds and join them at a single point near the ADC. Keep digital data lines short and routed away from IN+ and IN- to minimize coupled noise into the analog front-end.
Do not assume the input driver settles just because the amplifier datasheet claims 0.1% settling. At 16-bit resolution the actual settling target is 0.0015%, which most general-purpose op amps do not meet. Use the AD8021 or AD8476 for guaranteed 16-bit settling. Also ensure CAPA and CAPB reference-buffer bypass capacitors are placed close to the pins per datasheet.
合规信息
RoHS and REACH compliance per Analog Devices product page. Not AEC-Q100 qualified - this is an industrial-grade part.
