AD7703AR - 20-Bit Sigma-Delta ADC, SOIC-20 | Analog Devices
料号： AD7703AR ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $42.17 | $42.17 |
| 10 | $40.06 | $400.60 |
| 100 | $38 | $3,800.00 |
| 500 | $36.1 | $18,050.00 |
| 1,000 | $34.3 | $34,300.00 |
AD7703AR 概述
A sigma-delta ADC is a type of oversampling converter that digitizes an analog input by integrating it at a very high sampling rate and then decimating the result with a digital filter. Within the data-conversion hierarchy, the AD7703 sits above general-purpose successive-approximation ADCs in resolution, trading conversion speed for extremely high precision, and belongs to Analog Devices' LC2MOS (linear-compatible CMOS) data-acquisition family.
Key features include 20-bit resolution with no missing codes, self-calibration and system calibration modes that remove offset and gain error, and a flexible serial interface that supports both internal and external clocking. Because the digital sinc filter shapes the noise floor, the device achieves effective performance that discrete multi-stage designs cannot match without extensive trimming.
The LC2MOS process combines precision analog circuitry with low-power CMOS logic on one die. All dynamic characteristics, including input sampling frequency, output data rate, filter response, and calibration time, scale directly with the master clock f_CLKIN, as stated in the Analog Devices AD7703 datasheet (Rev. F), allowing designers to trade speed against filter settling and noise.
Typical applications include precision transducer measurement (thermocouples, RTDs, load cells), weigh-scale front ends, industrial process-control data loggers, and instrumentation requiring resolution beyond 16 bits, where the sigma-delta architecture and on-chip calibration reduce external signal-conditioning complexity.
Design consideration: allow full settling time after any calibration or input step; the digital filter's long impulse response means a single conversion immediately after a transient does not reflect the new input value.
This page synthesizes distributor pricing, same-family drop-in grading alternatives, and practical design notes not consolidated in the manufacturer datasheet. Pricing and stock referenced as of 2026-10-11.
直接替换替代料： AD7703AR ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： AD7703AR （相同外形与封装尺寸） ——差异在于 Architecture, Calibration, Operating Temperature Range, Package, Resolution.
快速对比工具——选择替代料号进行并排对比：
AD7703BR
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
AD7703AR-REEL
✅ 直接替换✓ 有现货
$27.2 / 个
查看数据手册 →AD7703BN
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
AD7703AR 最大额定值与电气特性
| 分辨率 | 20 bit |
| Number of Input Channels | 1 (differential) |
| Architecture | Sigma-Delta (Delta-Sigma) |
| Output Data Rate | up to 4 kSPS (nominal line rate per datasheet) |
| 接口类型 | Serial |
| Reference Type | External |
| Calibration | Self-calibration and system calibration modes |
| Clocking | Internal or external master clock (f_CLKIN) |
| Process Technology | LC2MOS |
| 封装 | 20-SOIC (wide body) |
| 安装类型 | Surface Mount |
| 工作温度范围 | -40C to +85C |
| Packaging | Tube |
| Sampling Rate Listing (distributor) | 16 kSPS (datasheets.com listing; see validation note) |
AD7703AR 20-soic (wide body) 引脚配置指南
AD7703AR（20-soic (wide body) 封装）的引脚配置。 该模拟元件具有输入、输出和电源引脚。请参阅制造商数据手册以了解失调调零、补偿和使能引脚配置。适用于信号调理和放大器电路。
暂无详细引脚数据： AD7703AR.
请参阅 数据手册 以查看完整引脚配置。
典型应用
AD7703AR 适用于 6 应用s: Precision Transducer Measurement, Weigh-Scale Front Ends, Industrial Process Control Data Loggers, Laboratory Instrumentation, Data Acquisition Systems, Temperature Monitoring and Control.
Precision Transducer Measurement
The AD7703AR fits thermocouple, RTD, and bridge-transducer measurement because its 20-bit resolution resolves microvolt-level signals and its differential input rejects common-mode noise on long sensor leads. In a typical circuit the sensor front end drives AIN differentially through an anti-alias filter, and system calibration removes offset and gain error contributed by the external reference and signal chain. Because the output data rate of 4 kSPS far exceeds the slow dynamics of thermal sensors, designers can lower the master clock to shrink filter bandwidth and push effective noise performance even further. The trade-off is settling time: after a step change or calibration, the digital filter needs several output updates before data is valid, so firmware must discard conversions during transients rather than expect an instantaneous sample-and-convert response.
推荐
Weigh-Scale Front Ends
Load cells produce full-scale outputs of only a few millivolts per volt of excitation, demanding ADC resolution well beyond 16 bits - exactly where the AD7703AR's 20-bit sigma-delta converter operates. The differential input connects directly across the bridge sense lines, while self-calibration compensates offset drift between temperature cycles. The sinc digital filter can be tuned by selecting the master clock so that 50/60 Hz line interference lands in a filter null, dramatically improving stable-weight readings without a costly analog notch filter. Performance consideration: mechanical vibration and creep, not converter speed, limit throughput here, so the 4 kSPS line rate is more than sufficient, and users should weight-average conversions in firmware for the highest stable display resolution on precision balances.
推荐
Industrial Process Control Data Loggers
In distributed process-control systems, the AD7703AR digitizes pressure, flow, and temperature transmitter loops where accuracy and long-term repeatability matter more than sample rate. Its serial interface isolates easily with optocouplers, keeping the noisy field side separate from controller logic, and the industrial -40C to +85C operating range matches cabinet-mounted equipment requirements. Because calibration time and output rate scale with f_CLKIN per the Analog Devices datasheet, designers clock the part conservatively (slower than maximum) to minimize noise and calibration frequency in electrically harsh environments. A practical consideration is power: the LC2MOS device draws low supply current, allowing compact isolated supplies, and the 20-SOIC package keeps the converter footprint small on dense analog input boards.
推荐
Laboratory Instrumentation
Bench instruments such as digital voltmeters, pH meters, and calibration sources use the AD7703AR where resolution beyond 16 bits must be achieved without trimmed discrete circuitry. Self-calibration at power-up and on command removes offset and gain error so that readings trace back mainly to the external voltage reference quality. The serial output connects directly to a microcontroller without parallel buses, simplifying isolation in floating-measurement front ends. Because the filter response is set digitally, engineers can exchange bandwidth for noise rejection by changing only the master clock, one design lever that discrete integrating converters lack. The main performance consideration is calibration duration, which scales with clock frequency; instruments should perform calibration during startup or idle periods so the user never waits for valid readings.
推荐
Data Acquisition Systems
For multi-board data-acquisition systems, the AD7703AR serves as a high-resolution channel converter behind multiplexers or as one converter per critical channel. Its 20-bit output resolves signals that 12- and 16-bit SAR converters quantize coarsely, and the on-chip calibration modes can be sequenced across channels at controlled intervals to hold system accuracy over temperature. The serial interface allows several converters to share a microcontroller port with individual chip-select lines, keeping harness complexity low. Designers should note that each channel change requires filter settling, so effective per-channel throughput is lower than the 4 kSPS line rate; sequencing slowly varying industrial channels and dedicating one AD7703AR per fast channel yields the best accuracy-throughput balance in mixed-speed DAQ architectures.
推荐
Temperature Monitoring and Control
High-accuracy temperature control loops - semiconductor ovens, environmental chambers, metrology baths - benefit from the AD7703AR's ability to resolve sub-0.01C changes from platinum RTD bridges. The 20-bit output combined with system calibration keeps converter error well below sensor error, so control-loop quality is bounded by the probe, not the digitizer. Sigma-delta filtering suppresses noise from nearby heaters and switching supplies, which commonly corrupt fast SAR readings in these environments. Since thermal plants have long time constants, the 4 kSPS maximum rate is vastly more than the loop requires; designers deliberately run a slow master clock for maximum filter attenuation at the price of latency, and should schedule recalibration when the process is at a steady state so control is not disturbed.
推荐
推荐产品汇总
工程参考数据： AD7703AR ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | AD7703BR | AD7703AR-REEL | AD7703BN |
|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | 20-SOIC | 20-SOIC - same footprint | 20-SOIC - same footprint | 20-DIP - footprint differs (socket adapter needed) |
| Resolution | 20 bit | 20 bit | 20 bit | 20 bit |
| Architecture | Sigma-Delta | Sigma-Delta | Sigma-Delta | Sigma-Delta |
| Output Data Rate | 4 kSPS (nominal, scales with f_CLKIN) | 4 kSPS (nominal) | 4 kSPS (nominal) | 4 kSPS (nominal) |
| Performance Grade (Linearity) | A grade (AR) | B grade - tighter linearity | A grade - same as AD7703AR | B grade - tighter linearity |
| Calibration | Self + system calibration | Self + system calibration | Self + system calibration | Self + system calibration |
| Interface | Serial | Serial (identical protocol) | Serial (identical protocol) | Serial (identical protocol) |
| Operating Temperature | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C |
关键差异点
- 20-bit resolution with no missing codes （对比 AD7705BRZ)
- B-grade linearity upgrade on the same footprint （对比 AD7703BR)
- Calibration flexibility （对比 typical uncalibrated SAR ADCs)
设计说明
Treat the differential AIN pair as a precision analog node: use a short, balanced RC anti-alias filter ahead of the input and keep switching supplies and digital returns away from the input routing. Because the sigma-delta modulator continuously samples at a rate tied to f_CLKIN, broadband noise at the input folds into the passband if not filtered. Ground the filter resistors at the analog ground point only. Estimated: a 1 kOhm / 100 nF differential filter gives a ~1.6 kHz corner, far above the slowest process signals but effective against out-of-band RF pickup.
The most frequent AD7703 design error is reading data before the digital filter has settled. After power-up, after a calibration command, or after an input step, several output update periods must elapse before the serial data reflects the true input - the sinc filter impulse response spans multiple conversions. Discard the first conversions in firmware and gate DRDY-based reads accordingly. Also verify that the master clock source is clean: jitter or drift on CLKIN shifts the output rate and filter nulls directly, since all timing is ratiometric to f_CLKIN per the Analog Devices datasheet.
Use a single solid ground plane with a defined analog region under the AD7703AR and its reference circuitry. Connect AGND and DGND at one low-impedance point, typically directly at the ADC, so digital return currents from the serial bus do not circulate through analog ground. Place the external reference bypassing (estimated: 10 uF ceramic plus 0.1 uF) within a few millimeters of the reference pin, because reference noise appears directly in the output code with no supply-rejection benefit. Keep the serial clock and data traces short; if the interface must cross an isolation barrier, optocouplers placed close to the ADC pins minimize the antenna length of the digital nets.
Decouple each supply pin with a 0.1 uF ceramic close to the package plus local bulk capacitance, and sequence power so no input or clock pin is driven while the device is unpowered. Estimated: for legacy 5V analog systems, ensure the reference voltage and input common-mode stay within the datasheet's allowed ranges over the full -40C to +85C span, since precision converters show their worst-case headroom at temperature extremes. Confirm exact supply limits in the AD7703 datasheet specification table before finalizing the power tree.
合规信息
RoHS/REACH status not stated in the provided verified web data; confirm on the Analog Devices AD7703 product page for the specific ordering code.
